[PATCH 1/4] spi: spi-qcom-qspi: Ignore disabled interrupts' status in isr

From: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
To: agross@kernel.org, andersson@kernel.org,
	konrad.dybcio@linaro.org, broonie@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: quic_msavaliy@quicinc.com, dianders@chromium.org,
	mka@chromium.org, swboyd@chromium.org, quic_vtanuku@quicinc.com,
	dan.carpenter@linaro.org,
	Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Subject: [PATCH 1/4] spi: spi-qcom-qspi: Ignore disabled interrupts' status in isr
Date: Tue, 25 Jul 2023 17:18:06 +0530	[thread overview]
Message-ID: <1690285689-30233-2-git-send-email-quic_vnivarth@quicinc.com> (raw)
In-Reply-To: <1690285689-30233-1-git-send-email-quic_vnivarth@quicinc.com>

During FIFO/DMA modes dynamic switching, only corresponding interrupts are
enabled. However its possible that FIFO related interrupt status registers
get set during DMA mode. For example WR_FIFO_EMPTY bit is set during DMA
TX.

Ignore such status bits so that they don't trip unwanted operations.

Suggested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
---
 drivers/spi/spi-qcom-qspi.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c
index a0ad980..b995542 100644
--- a/drivers/spi/spi-qcom-qspi.c
+++ b/drivers/spi/spi-qcom-qspi.c
@@ -603,6 +603,9 @@ static irqreturn_t qcom_qspi_irq(int irq, void *dev_id)
 	int_status = readl(ctrl->base + MSTR_INT_STATUS);
 	writel(int_status, ctrl->base + MSTR_INT_STATUS);
 
+	/* Ignore disabled interrupts */
+	int_status &= readl(ctrl->base + MSTR_INT_EN);
+
 	/* PIO mode handling */
 	if (ctrl->xfer.dir == QSPI_WRITE) {
 		if (int_status & WR_FIFO_EMPTY)
-- 
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