From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: "Fredrik Noring" <noring@nocrew.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Craig Janeczek <jancraig@amazon.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, Jiaxun Yang <jiaxun.yang@flygoat.com>,
Laurent Vivier <laurent@vivier.eu>,
"Maciej W. Rozycki" <macro@linux-mips.org>,
Huacai Chen <chenhc@lemote.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH 26/26] MAINTAINERS: Add entry for MIPS Toshiba TCG
Date: Sun, 13 Dec 2020 16:23:23 +0100 [thread overview]
Message-ID: <192865b5-3c62-3e04-c927-088b38e21d76@amsat.org> (raw)
In-Reply-To: <X9Tp8VFjqaayVkSy@sx9>
Hi Fredrik,
On 12/12/20 5:04 PM, Fredrik Noring wrote:
> On Fri, Nov 20, 2020 at 10:08:44PM +0100, Philippe Mathieu-Daudé wrote:
>> Add an entry for the TCG core related to Toshiba TXx9.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> Adding Fredrik Noring in case he wants to be notified of changes,
>> patch conditional to his approval.
>
> I may be able to help on the TX79 that is an R5900, but unless commit
> 823f2897bdd7 ("target/mips: Disable R5900 support") is reverted, it
> remains shut off in QEMU. To obtain n32, in addition to o32, one may
> want to apply something similar to this:
I added o32 because these are the only binaries I could find to test
the CPU you added. Are there n32 binaries easily available?
I noticed GCC merged your patch, and Gentoo too. It should be enough
to respin the Docker image to cross-compile and test the TCG tests
you already added:
8e2e5e7daca tests/tcg: mips: Test R5900 three-operand MADDU
84dc0712361 tests/tcg: mips: Test R5900 three-operand MADD1
50f299da629 tests/tcg: mips: Test R5900 three-operand MADD
35eb9be6bb6 tests/tcg/mips: Add tests for R5900 DIVU1
990aa328be4 tests/tcg/mips: Add tests for R5900 DIV1
4d261a6a595 tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1
3303f017adb tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1
bec4d66b248 tests/tcg/mips: Add tests for R5900 three-operand MULTU1
cb56125eea7 tests/tcg/mips: Add tests for R5900 three-operand MULT1
667eded2702 tests/tcg/mips: Add tests for R5900 three-operand MULTU
>
> diff --git a/linux-user/mips64/target_elf.h b/linux-user/mips64/target_elf.h
> index ec55d8542a..5f2f2df29f 100644
> --- a/linux-user/mips64/target_elf.h
> +++ b/linux-user/mips64/target_elf.h
> @@ -12,6 +12,9 @@ static inline const char *cpu_get_model(uint32_t eflags)
> if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_64R6) {
> return "I6400";
> }
> + if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) {
> + return "R5900";
> + }
> return "5KEf";
> }
> #endif
>
>> ---
>> MAINTAINERS | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index b6d98b95c47..d97f0f1d66e 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -253,6 +253,12 @@ R: Craig Janeczek <jancraig@amazon.com>
>> S: Odd Fixes
>> F: target/mips/vendor-xburst*
>>
>> +MIPS TCG CPUs (Toshiba TX)
>> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> +R: Fredrik Noring <noring@nocrew.org>
>> +S: Odd Fixes
>> +F: target/mips/vendor-tx*
BTW I should also include here:
F: tests/tcg/mips/user/isa/r5900/
Regards,
Phil.
next prev parent reply other threads:[~2020-12-13 15:24 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 21:08 [PATCH 00/26] target/mips: Explode 60% of the 32K-lines translate.c Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 01/26] target/mips: Extract FPU helpers to 'fpu_helper.h' Philippe Mathieu-Daudé
2020-11-21 19:39 ` Richard Henderson
2020-11-22 17:01 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 02/26] target/mips: Extract MSA helpers to mod-mips-msa_helper.c Philippe Mathieu-Daudé
2020-11-21 19:44 ` Richard Henderson
2020-11-22 17:16 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 03/26] target/mips: Extract MSA helper definitions Philippe Mathieu-Daudé
2020-11-21 19:45 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 04/26] target/mips: Extract MSA translation routines Philippe Mathieu-Daudé
2020-11-21 19:47 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 05/26] target/mips: Rename dsp_helper.c as mod-mips-dsp_helper.c Philippe Mathieu-Daudé
2020-11-21 19:48 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 06/26] target/mips: Extract DSP helper definitions Philippe Mathieu-Daudé
2020-11-21 19:48 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 07/26] target/mips: Extract DSP translation routines Philippe Mathieu-Daudé
2020-11-21 19:51 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 08/26] target/mips: Extract Multi-Threading helper definitions Philippe Mathieu-Daudé
2020-11-21 19:53 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 09/26] target/mips: Extract Code Compaction ASE translation routines Philippe Mathieu-Daudé
2020-11-21 19:56 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 10/26] target/mips: Extract the microMIPS ISA helper definitions Philippe Mathieu-Daudé
2020-11-21 20:00 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 11/26] target/mips: Extract the microMIPS ISA translation routines Philippe Mathieu-Daudé
2020-11-21 20:02 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 12/26] target/mips: Extract nanoMIPS " Philippe Mathieu-Daudé
2020-11-21 20:04 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 13/26] target/mips: Extract NEC Vr54xx helpers to vendor-vr54xx_helper.c Philippe Mathieu-Daudé
2020-11-21 20:05 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 14/26] target/mips: Extract NEC Vr54xx helper definitions Philippe Mathieu-Daudé
2020-11-21 20:06 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 15/26] target/mips: Extract NEC Vr54xx translation routines Philippe Mathieu-Daudé
2020-11-21 20:06 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 16/26] target/mips: Rename lmmi_helper.c as loong-simd_helper.c Philippe Mathieu-Daudé
2020-11-21 20:07 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 17/26] target/mips: Extract Loongson SIMD helper definitions Philippe Mathieu-Daudé
2020-11-21 20:07 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 18/26] target/mips: Extract Loongson SIMD translation routines Philippe Mathieu-Daudé
2020-11-21 14:30 ` Philippe Mathieu-Daudé
2020-11-21 20:09 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 19/26] target/mips: Extract Loongson EXTensions " Philippe Mathieu-Daudé
2020-11-21 20:10 ` Richard Henderson
2020-11-22 17:49 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 20/26] target/mips: Extract XBurst Media eXtension Unit " Philippe Mathieu-Daudé
2020-11-21 20:13 ` Richard Henderson
2020-11-22 17:58 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 21/26] target/mips: Make pipeline 1 multiply opcodes generic Philippe Mathieu-Daudé
2020-11-21 20:14 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 22/26] target/mips: Extract Toshiba TXx9 translation routines Philippe Mathieu-Daudé
2020-11-21 20:15 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 23/26] target/mips: Extract Toshiba TX79 multimedia " Philippe Mathieu-Daudé
2020-11-21 20:17 ` Richard Henderson
2020-11-22 19:47 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 24/26] MAINTAINERS: Add entry for MIPS Loongson TCG Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 25/26] MAINTAINERS: Add entry for MIPS Ingenic Xburst TCG Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 26/26] MAINTAINERS: Add entry for MIPS Toshiba TCG Philippe Mathieu-Daudé
2020-12-12 16:04 ` Fredrik Noring
2020-12-13 15:23 ` Philippe Mathieu-Daudé [this message]
2020-12-13 16:40 ` Fredrik Noring
2020-12-14 12:05 ` Fredrik Noring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=192865b5-3c62-3e04-c927-088b38e21d76@amsat.org \
--to=f4bug@amsat.org \
--cc=aleksandar.rikalo@syrmia.com \
--cc=alex.bennee@linaro.org \
--cc=aurelien@aurel32.net \
--cc=chenhc@lemote.com \
--cc=jancraig@amazon.com \
--cc=jiaxun.yang@flygoat.com \
--cc=laurent@vivier.eu \
--cc=macro@linux-mips.org \
--cc=noring@nocrew.org \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.