From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Fredrik Noring" <noring@nocrew.org>,
"Craig Janeczek" <jancraig@amazon.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Laurent Vivier" <laurent@vivier.eu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Huacai Chen" <chenhc@lemote.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH 13/26] target/mips: Extract NEC Vr54xx helpers to vendor-vr54xx_helper.c
Date: Fri, 20 Nov 2020 22:08:31 +0100 [thread overview]
Message-ID: <20201120210844.2625602-14-f4bug@amsat.org> (raw)
In-Reply-To: <20201120210844.2625602-1-f4bug@amsat.org>
Extract NEC Vr54xx helpers from op_helper.c to a new file:
'vendor-vr54xx_helper.c'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/op_helper.c | 118 --------------------------
target/mips/vendor-vr54xx_helper.c | 131 +++++++++++++++++++++++++++++
target/mips/meson.build | 1 +
3 files changed, 132 insertions(+), 118 deletions(-)
create mode 100644 target/mips/vendor-vr54xx_helper.c
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index dd09a4c714a..a900c008b5a 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -54,124 +54,6 @@ static void raise_exception(CPUMIPSState *env, uint32_t exception)
do_raise_exception(env, exception, 0);
}
-/* 64 bits arithmetic for 32 bits hosts */
-static inline uint64_t get_HILO(CPUMIPSState *env)
-{
- return ((uint64_t)(env->active_tc.HI[0]) << 32) |
- (uint32_t)env->active_tc.LO[0];
-}
-
-static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
-{
- env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
- return env->active_tc.HI[0] = (int32_t)(HILO >> 32);
-}
-
-static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO)
-{
- target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
- env->active_tc.HI[0] = (int32_t)(HILO >> 32);
- return tmp;
-}
-
-/* Multiplication variants of the vr54xx. */
-target_ulong helper_muls(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, 0 - ((int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2));
-}
-
-target_ulong helper_mulsu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, 0 - (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_macc(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_macchi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_maccu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (uint64_t)get_HILO(env) +
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_macchiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)get_HILO(env) +
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_msac(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_msachi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_msacu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (uint64_t)get_HILO(env) -
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_msachiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)get_HILO(env) -
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_mulhi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_mulhiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_mulshi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, 0 - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_mulshiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, 0 - (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
static inline target_ulong bitswap(target_ulong v)
{
v = ((v >> 1) & (target_ulong)0x5555555555555555ULL) |
diff --git a/target/mips/vendor-vr54xx_helper.c b/target/mips/vendor-vr54xx_helper.c
new file mode 100644
index 00000000000..d8c8f648b54
--- /dev/null
+++ b/target/mips/vendor-vr54xx_helper.c
@@ -0,0 +1,131 @@
+/*
+ * MIPS NEC Vr54xx instruction emulation helpers for QEMU.
+ *
+ * Copyright (c) 2004-2005 Jocelyn Mayer
+ * Copyright (c) 2006 Marius Groeger (FPU operations)
+ * Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support)
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+
+/* 64 bits arithmetic for 32 bits hosts */
+static inline uint64_t get_HILO(CPUMIPSState *env)
+{
+ return ((uint64_t)(env->active_tc.HI[0]) << 32) |
+ (uint32_t)env->active_tc.LO[0];
+}
+
+static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
+{
+ env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
+ return env->active_tc.HI[0] = (int32_t)(HILO >> 32);
+}
+
+static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO)
+{
+ target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
+ env->active_tc.HI[0] = (int32_t)(HILO >> 32);
+ return tmp;
+}
+
+/* Multiplication variants of the vr54xx. */
+target_ulong helper_muls(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, 0 - ((int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2));
+}
+
+target_ulong helper_mulsu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, 0 - (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_macc(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_macchi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_maccu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (uint64_t)get_HILO(env) +
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_macchiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)get_HILO(env) +
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_msac(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_msachi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_msacu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (uint64_t)get_HILO(env) -
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_msachiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)get_HILO(env) -
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_mulhi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_mulhiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_mulshi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, 0 - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_mulshiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, 0 - (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
diff --git a/target/mips/meson.build b/target/mips/meson.build
index cc4677d94dc..b63ef41cb1d 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -8,6 +8,7 @@
'op_helper.c',
'mod-mips-dsp_helper.c',
'mod-mips-msa_helper.c',
+ 'vendor-vr54xx_helper.c',
'translate.c',
))
--
2.26.2
next prev parent reply other threads:[~2020-11-20 21:18 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 21:08 [PATCH 00/26] target/mips: Explode 60% of the 32K-lines translate.c Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 01/26] target/mips: Extract FPU helpers to 'fpu_helper.h' Philippe Mathieu-Daudé
2020-11-21 19:39 ` Richard Henderson
2020-11-22 17:01 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 02/26] target/mips: Extract MSA helpers to mod-mips-msa_helper.c Philippe Mathieu-Daudé
2020-11-21 19:44 ` Richard Henderson
2020-11-22 17:16 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 03/26] target/mips: Extract MSA helper definitions Philippe Mathieu-Daudé
2020-11-21 19:45 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 04/26] target/mips: Extract MSA translation routines Philippe Mathieu-Daudé
2020-11-21 19:47 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 05/26] target/mips: Rename dsp_helper.c as mod-mips-dsp_helper.c Philippe Mathieu-Daudé
2020-11-21 19:48 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 06/26] target/mips: Extract DSP helper definitions Philippe Mathieu-Daudé
2020-11-21 19:48 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 07/26] target/mips: Extract DSP translation routines Philippe Mathieu-Daudé
2020-11-21 19:51 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 08/26] target/mips: Extract Multi-Threading helper definitions Philippe Mathieu-Daudé
2020-11-21 19:53 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 09/26] target/mips: Extract Code Compaction ASE translation routines Philippe Mathieu-Daudé
2020-11-21 19:56 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 10/26] target/mips: Extract the microMIPS ISA helper definitions Philippe Mathieu-Daudé
2020-11-21 20:00 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 11/26] target/mips: Extract the microMIPS ISA translation routines Philippe Mathieu-Daudé
2020-11-21 20:02 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 12/26] target/mips: Extract nanoMIPS " Philippe Mathieu-Daudé
2020-11-21 20:04 ` Richard Henderson
2020-11-20 21:08 ` Philippe Mathieu-Daudé [this message]
2020-11-21 20:05 ` [PATCH 13/26] target/mips: Extract NEC Vr54xx helpers to vendor-vr54xx_helper.c Richard Henderson
2020-11-20 21:08 ` [PATCH 14/26] target/mips: Extract NEC Vr54xx helper definitions Philippe Mathieu-Daudé
2020-11-21 20:06 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 15/26] target/mips: Extract NEC Vr54xx translation routines Philippe Mathieu-Daudé
2020-11-21 20:06 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 16/26] target/mips: Rename lmmi_helper.c as loong-simd_helper.c Philippe Mathieu-Daudé
2020-11-21 20:07 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 17/26] target/mips: Extract Loongson SIMD helper definitions Philippe Mathieu-Daudé
2020-11-21 20:07 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 18/26] target/mips: Extract Loongson SIMD translation routines Philippe Mathieu-Daudé
2020-11-21 14:30 ` Philippe Mathieu-Daudé
2020-11-21 20:09 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 19/26] target/mips: Extract Loongson EXTensions " Philippe Mathieu-Daudé
2020-11-21 20:10 ` Richard Henderson
2020-11-22 17:49 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 20/26] target/mips: Extract XBurst Media eXtension Unit " Philippe Mathieu-Daudé
2020-11-21 20:13 ` Richard Henderson
2020-11-22 17:58 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 21/26] target/mips: Make pipeline 1 multiply opcodes generic Philippe Mathieu-Daudé
2020-11-21 20:14 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 22/26] target/mips: Extract Toshiba TXx9 translation routines Philippe Mathieu-Daudé
2020-11-21 20:15 ` Richard Henderson
2020-11-20 21:08 ` [PATCH 23/26] target/mips: Extract Toshiba TX79 multimedia " Philippe Mathieu-Daudé
2020-11-21 20:17 ` Richard Henderson
2020-11-22 19:47 ` Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 24/26] MAINTAINERS: Add entry for MIPS Loongson TCG Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 25/26] MAINTAINERS: Add entry for MIPS Ingenic Xburst TCG Philippe Mathieu-Daudé
2020-11-20 21:08 ` [PATCH 26/26] MAINTAINERS: Add entry for MIPS Toshiba TCG Philippe Mathieu-Daudé
2020-12-12 16:04 ` Fredrik Noring
2020-12-13 15:23 ` Philippe Mathieu-Daudé
2020-12-13 16:40 ` Fredrik Noring
2020-12-14 12:05 ` Fredrik Noring
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