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From: Jerome Brunet <jbrunet@baylibre.com>
To: "qianggui.song" <Qianggui.Song@amlogic.com>,
	Linus Walleij <linus.walleij@linaro.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org
Subject: Re: [PATCH 3/3] pinctrl: meson: add pinctrl driver support for Meson-S4 Soc
Date: Thu, 16 Dec 2021 10:20:54 +0100	[thread overview]
Message-ID: <1jczlwaoqj.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <0a3efa6f-f048-ee04-a2d6-30f337f3d484@amlogic.com>


On Thu 16 Dec 2021 at 14:07, qianggui.song <Qianggui.Song@amlogic.com> wrote:

>>> +static const unsigned int clk12_24_pins[]		= { GPIOD_10 };
>>> +static const unsigned int pwm_g_hiz_pins[]		= { GPIOD_11 };
>>> +
>> [...]
>> 
>>> +
>>> +static const char * const tdm_groups[] = {
>>> +	"tdm_d2_c", "tdm_d3_c", "tdm_fs1_c", "tdm_d4_c", "tdm_d5_c",
>>> +	"tdm_fs1_d", "tdm_d4_d", "tdm_d3_d", "tdm_d2_d", "tdm_sclk1_d",
>>> +	"tdm_sclk1_h", "tdm_fs1_h", "tdm_d2_h", "tdm_d3_h", "tdm_d4_h",
>>> +	"tdm_d1", "tdm_d0", "tdm_fs0", "tdm_sclk0", "tdm_fs2", "tdm_sclk2",
>>> +	"tdm_d4_z", "tdm_d5_z", "tdm_d6", "tdm_d7"
>>> +};
>> On previous chip, there were pin assigned to tdm A, B or C.
>> On this generation, it seems you have added a second level on pinmuxing
>> to re-route the audio pins to different controllers
>> In such case, I don't think they belong in the same group.
>> Depending on settins, D2 and D3 could be unrelated
>> I think each audio pin should have its own group (one group for D3, one
>> D4, etc ...)
>> 
> According to our audio colleague, on this chip, tdm A/B/C can choose which
> pins are routed to their controllers freely by writing special registers,
> say, tdm_d2_c can be assigned to any of tdm a, b and c by demand, so no
> need to specify a/b/c words any more.

That's basically my comment above. Comment still stands
Each D and FS pin could be related to different interface and should be
in different groups


WARNING: multiple messages have this Message-ID (diff)
From: Jerome Brunet <jbrunet@baylibre.com>
To: "qianggui.song" <Qianggui.Song@amlogic.com>,
	Linus Walleij <linus.walleij@linaro.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org
Subject: Re: [PATCH 3/3] pinctrl: meson: add pinctrl driver support for Meson-S4 Soc
Date: Thu, 16 Dec 2021 10:20:54 +0100	[thread overview]
Message-ID: <1jczlwaoqj.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <0a3efa6f-f048-ee04-a2d6-30f337f3d484@amlogic.com>


On Thu 16 Dec 2021 at 14:07, qianggui.song <Qianggui.Song@amlogic.com> wrote:

>>> +static const unsigned int clk12_24_pins[]		= { GPIOD_10 };
>>> +static const unsigned int pwm_g_hiz_pins[]		= { GPIOD_11 };
>>> +
>> [...]
>> 
>>> +
>>> +static const char * const tdm_groups[] = {
>>> +	"tdm_d2_c", "tdm_d3_c", "tdm_fs1_c", "tdm_d4_c", "tdm_d5_c",
>>> +	"tdm_fs1_d", "tdm_d4_d", "tdm_d3_d", "tdm_d2_d", "tdm_sclk1_d",
>>> +	"tdm_sclk1_h", "tdm_fs1_h", "tdm_d2_h", "tdm_d3_h", "tdm_d4_h",
>>> +	"tdm_d1", "tdm_d0", "tdm_fs0", "tdm_sclk0", "tdm_fs2", "tdm_sclk2",
>>> +	"tdm_d4_z", "tdm_d5_z", "tdm_d6", "tdm_d7"
>>> +};
>> On previous chip, there were pin assigned to tdm A, B or C.
>> On this generation, it seems you have added a second level on pinmuxing
>> to re-route the audio pins to different controllers
>> In such case, I don't think they belong in the same group.
>> Depending on settins, D2 and D3 could be unrelated
>> I think each audio pin should have its own group (one group for D3, one
>> D4, etc ...)
>> 
> According to our audio colleague, on this chip, tdm A/B/C can choose which
> pins are routed to their controllers freely by writing special registers,
> say, tdm_d2_c can be assigned to any of tdm a, b and c by demand, so no
> need to specify a/b/c words any more.

That's basically my comment above. Comment still stands
Each D and FS pin could be related to different interface and should be
in different groups


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

WARNING: multiple messages have this Message-ID (diff)
From: Jerome Brunet <jbrunet@baylibre.com>
To: "qianggui.song" <Qianggui.Song@amlogic.com>,
	Linus Walleij <linus.walleij@linaro.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org
Subject: Re: [PATCH 3/3] pinctrl: meson: add pinctrl driver support for Meson-S4 Soc
Date: Thu, 16 Dec 2021 10:20:54 +0100	[thread overview]
Message-ID: <1jczlwaoqj.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <0a3efa6f-f048-ee04-a2d6-30f337f3d484@amlogic.com>


On Thu 16 Dec 2021 at 14:07, qianggui.song <Qianggui.Song@amlogic.com> wrote:

>>> +static const unsigned int clk12_24_pins[]		= { GPIOD_10 };
>>> +static const unsigned int pwm_g_hiz_pins[]		= { GPIOD_11 };
>>> +
>> [...]
>> 
>>> +
>>> +static const char * const tdm_groups[] = {
>>> +	"tdm_d2_c", "tdm_d3_c", "tdm_fs1_c", "tdm_d4_c", "tdm_d5_c",
>>> +	"tdm_fs1_d", "tdm_d4_d", "tdm_d3_d", "tdm_d2_d", "tdm_sclk1_d",
>>> +	"tdm_sclk1_h", "tdm_fs1_h", "tdm_d2_h", "tdm_d3_h", "tdm_d4_h",
>>> +	"tdm_d1", "tdm_d0", "tdm_fs0", "tdm_sclk0", "tdm_fs2", "tdm_sclk2",
>>> +	"tdm_d4_z", "tdm_d5_z", "tdm_d6", "tdm_d7"
>>> +};
>> On previous chip, there were pin assigned to tdm A, B or C.
>> On this generation, it seems you have added a second level on pinmuxing
>> to re-route the audio pins to different controllers
>> In such case, I don't think they belong in the same group.
>> Depending on settins, D2 and D3 could be unrelated
>> I think each audio pin should have its own group (one group for D3, one
>> D4, etc ...)
>> 
> According to our audio colleague, on this chip, tdm A/B/C can choose which
> pins are routed to their controllers freely by writing special registers,
> say, tdm_d2_c can be assigned to any of tdm a, b and c by demand, so no
> need to specify a/b/c words any more.

That's basically my comment above. Comment still stands
Each D and FS pin could be related to different interface and should be
in different groups


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-12-16  9:22 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-14  2:20 [PATCH 0/3] pinctrl: meson-s4: add pinctrl driver Qianggui Song
2021-12-14  2:20 ` Qianggui Song
2021-12-14  2:20 ` Qianggui Song
2021-12-14  2:20 ` [PATCH 1/3] dt-bindings: pinctrl: meson: Add compatible for S4 Qianggui Song
2021-12-14  2:20   ` Qianggui Song
2021-12-14  2:20   ` Qianggui Song
2021-12-14  2:20 ` [PATCH 2/3] dt-bindings: gpio: Add a header file for Amlogic Meson S4 Qianggui Song
2021-12-14  2:20   ` Qianggui Song
2021-12-14  2:20   ` Qianggui Song
2021-12-15 20:29   ` Rob Herring
2021-12-15 20:29     ` Rob Herring
2021-12-15 20:29     ` Rob Herring
2021-12-14  2:21 ` [PATCH 3/3] pinctrl: meson: add pinctrl driver support for Meson-S4 Soc Qianggui Song
2021-12-14  2:21   ` Qianggui Song
2021-12-14  2:21   ` Qianggui Song
2021-12-14 10:00   ` Jerome Brunet
2021-12-14 10:00     ` Jerome Brunet
2021-12-14 10:00     ` Jerome Brunet
2021-12-16  6:07     ` qianggui.song
2021-12-16  6:07       ` qianggui.song
2021-12-16  9:20       ` Jerome Brunet [this message]
2021-12-16  9:20         ` Jerome Brunet
2021-12-16  9:20         ` Jerome Brunet
2021-12-17  9:23         ` qianggui.song
2021-12-17  9:23           ` qianggui.song
2021-12-14 11:57   ` Andy Shevchenko
2021-12-14 11:57     ` Andy Shevchenko
2021-12-14 11:57     ` Andy Shevchenko
2021-12-16  3:24     ` qianggui.song
2021-12-16  3:24       ` qianggui.song

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