From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Use 128k alignment for untiled display surface on i965
Date: Mon, 5 Jul 2010 09:36:36 -0700 [thread overview]
Message-ID: <20100705093636.2c24208d@jbarnes-x201> (raw)
In-Reply-To: <1278321957-29569-1-git-send-email-chris@chris-wilson.co.uk>
On Mon, 5 Jul 2010 10:25:57 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> The original i965 requires an alignment of 128K for the display surface
> with linear memory, so increase the requirement from 64k for these
> chipsets. For the later chipsets in the i965 family, only a 4k alignment
> is required. (So long as we do not start performing asynchronous flips.)
>
> Note the impact of this should be slight as on i965 we should be using a
> tiled frontbuffer for anything up to a 4096x4096 display.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
Looks good.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
prev parent reply other threads:[~2010-07-05 16:36 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-05 9:25 [PATCH] drm/i915: Use 128k alignment for untiled display surface on i965 Chris Wilson
2010-07-05 16:22 ` Eric Anholt
2010-07-05 16:39 ` Chris Wilson
2010-07-05 17:01 ` [PATCH 1/2] drm/i915: Use 128k alignment for untiled display surface on i965 (v2) Chris Wilson
2010-07-05 17:01 ` [PATCH 2/2] drm/i915: Include any alternate names by which the device is known Chris Wilson
2010-07-05 17:08 ` Chris Wilson
2010-07-06 1:22 ` Zhenyu Wang
2010-07-08 18:28 ` Eric Anholt
2010-07-05 16:36 ` Jesse Barnes [this message]
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