From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/6] arm: cache-l2x0: add support for Aurora L2 cache ctrl
Date: Tue, 28 Aug 2012 00:49:45 +0100 [thread overview]
Message-ID: <20120827234944.GB7804@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <503BAEE7.5080401@free-electrons.com>
On Mon, Aug 27, 2012 at 06:31:19PM +0100, Gregory CLEMENT wrote:
> On 08/24/2012 02:45 PM, Gregory CLEMENT wrote:
> > On 08/24/2012 12:43 PM, Will Deacon wrote:> On Fri, Aug 24, 2012 at 10:09:18AM +0100, Gregory CLEMENT wrote:
> >> 2. I'm surprised that there aren't barriers and/or maintenance operations
> >> needed around this operation. It might be worth checking in the
> >> documentation that you have (you probably need at least an isb()
> >> following the mcr).
> >
> > I didn't find any mention of barriers and/or maintenance operations
> > needed around this operation, but maybe I have missed something, or it
> > was implicit for the people who wrote the documentation. I will ask
> > confirmation that we don't need this.
>
> I've just received confirmation that this register is r/w from non-secure.
> And that it would be good practice to have an ISB after this MCR, so I
> will add this for the next version coming soon.
That sounds about right, thanks for checking. Can you also confirm that
we don't need an explicit L2 invalidation, like we have for the
memory-mapped interface?
Cheers,
Will
next prev parent reply other threads:[~2012-08-27 23:49 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-24 9:09 Add support for Aurora L2 Cache Controller Gregory CLEMENT
2012-08-24 9:09 ` [PATCH 1/6] arm: cache-l2x0: make outer_cache_fns a field of l2x0_of_data Gregory CLEMENT
2012-08-24 9:09 ` [PATCH 2/6] arm: cache-l2x0: add an optional register to save/restore Gregory CLEMENT
2012-08-24 9:09 ` [PATCH 3/6] arm: cache-l2x0: add support for Aurora L2 cache ctrl Gregory CLEMENT
2012-08-24 10:43 ` Will Deacon
2012-08-24 12:45 ` Gregory CLEMENT
2012-08-27 17:31 ` Gregory CLEMENT
2012-08-27 23:49 ` Will Deacon [this message]
2012-08-24 12:18 ` Sebastian Hesselbarth
2012-08-24 9:09 ` [PATCH 4/6] arm: mvebu: add L2 cache support Gregory CLEMENT
2012-08-24 9:09 ` [PATCH 5/6] arm: mvebu: add Aurora L2 Cache Controller to the DT Gregory CLEMENT
2012-08-24 14:56 ` Ian Molton
2012-08-24 15:15 ` Gregory CLEMENT
2012-08-27 9:25 ` Ian Molton
2012-08-27 17:32 ` Gregory CLEMENT
2012-08-24 9:09 ` [PATCH 6/6] arm: l2x0: add aurora related properties to OF binding Gregory CLEMENT
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