Re: [PATCH 2/4] drm/i915: Only apply the mb() when flushing the GTT domain during a finish

From: Daniel Vetter <daniel@ffwll.ch>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/4] drm/i915: Only apply the mb() when flushing the GTT domain during a finish
Date: Sat, 19 Jan 2013 14:40:16 +0100	[thread overview]
Message-ID: <20130119134016.GA31870@phenom.ffwll.local> (raw)
In-Reply-To: <20121011124342.4102105a@jbarnes-desktop>

On Thu, Oct 11, 2012 at 12:43:42PM -0700, Jesse Barnes wrote:
> On Tue,  9 Oct 2012 19:24:38 +0100
> Chris Wilson <chris@chris-wilson.co.uk> wrote:
> 
> > Now that we seem to have brought order to the GTT barriers, the last one
> > to review is the terminal barrier before we unbind the buffer from the
> > GTT. This needs to only be performed if the buffer still resides in the
> > GTT domain, and so we can skip some needless barriers otherwise.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/i915_gem.c |    6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index 3c4577b..ed8d21a 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -2526,15 +2526,15 @@ static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj)
> >  {
> >  	u32 old_write_domain, old_read_domains;
> >  
> > -	/* Act a barrier for all accesses through the GTT */
> > -	mb();
> > -
> >  	/* Force a pagefault for domain tracking on next user access */
> >  	i915_gem_release_mmap(obj);
> >  
> >  	if ((obj->base.read_domains & I915_GEM_DOMAIN_GTT) == 0)
> >  		return;
> >  
> > +	/* Wait for any direct GTT access to complete */
> > +	mb();
> > +
> >  	old_read_domains = obj->base.read_domains;
> >  	old_write_domain = obj->base.write_domain;
> >  
> 
> Yeah this looks like a better place to put it.  You're trying to
> serialize this against a subsequent fence or map operation?
> 
> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Patches 1-2 queued for next, thanks.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch