From: Stephen Rothwell <sfr@canb.auug.org.au> To: Dave Airlie <airlied@linux.ie> Cc: linux-next@vger.kernel.org, linux-kernel@vger.kernel.org, Jani Nikula <jani.nikula@intel.com>, Daniel Vetter <daniel.vetter@ffwll.ch>, <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>, Rodrigo Vivi <rodrigo.vivi@gmail.com>, Ben Widawsky <benjamin.widawsky@intel.com> Subject: linux-next: manual merge of the drm tree with the drm-intel-fixes tree Date: Mon, 28 Oct 2013 16:46:09 +1100 [thread overview] Message-ID: <20131028164609.bdec95d18a41b59fc37fbae1@canb.auug.org.au> (raw) [-- Attachment #1: Type: text/plain, Size: 2957 bytes --] Hi Dave, Today's linux-next merge of the drm tree got a conflict in drivers/gpu/drm/i915/intel_dp.c between commit 0cc4b69960f3 ("drm/i915: Mask LPSP to get PSR working even with Power Well in use by audio") from Linus' tree and commit 52e1e223456e ("drm/i915/dp: workaround BIOS eDP bpp clamping issue") from the drm-intel-fixes tree and commits 18442d087864 ("drm/i915: Fix port_clock and adjusted_mode.clock readout all over") and 18b5992c3756 ("drm/i915: Calculate PSR register offsets from base + gen") from the drm tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). -- Cheers, Stephen Rothwell sfr@canb.auug.org.au diff --cc drivers/gpu/drm/i915/intel_dp.c index 1a431377d83b,1e3d2720d811..000000000000 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@@ -1402,31 -1469,20 +1469,40 @@@ static void intel_dp_get_config(struct pipe_config->port_clock = 270000; } + if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp && + pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) { + /* + * This is a big fat ugly hack. + * + * Some machines in UEFI boot mode provide us a VBT that has 18 + * bpp and 1.62 GHz link bandwidth for eDP, which for reasons + * unknown we fail to light up. Yet the same BIOS boots up with + * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as + * max, not what it tells us to use. + * + * Note: This will still be broken if the eDP panel is not lit + * up by the BIOS, and thus we can't get the mode at module + * load. + */ + DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n", + pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp); + dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp; + } ++ + dotclock = intel_dotclock_calculate(pipe_config->port_clock, + &pipe_config->dp_m_n); + + if (HAS_PCH_SPLIT(dev_priv->dev) && port != PORT_A) + ironlake_check_encoder_dotclock(pipe_config, dotclock); + + pipe_config->adjusted_mode.crtc_clock = dotclock; } - static bool is_edp_psr(struct intel_dp *intel_dp) + static bool is_edp_psr(struct drm_device *dev) { - return is_edp(intel_dp) && - intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED; + struct drm_i915_private *dev_priv = dev->dev_private; + + return dev_priv->psr.sink_support; } static bool intel_edp_is_psr_enabled(struct drm_device *dev) @@@ -1486,8 -1542,8 +1562,8 @@@ static void intel_edp_psr_setup(struct intel_edp_psr_write_vsc(intel_dp, &psr_vsc); /* Avoid continuous PSR exit by masking memup and hpd */ - I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | + I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP | - EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); + EDP_PSR_DEBUG_MASK_HPD); intel_dp->psr_setup_done = true; } [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Rothwell <sfr@canb.auug.org.au> To: Dave Airlie <airlied@linux.ie> Cc: linux-next@vger.kernel.org, linux-kernel@vger.kernel.org, Jani Nikula <jani.nikula@intel.com>, Daniel Vetter <daniel.vetter@ffwll.ch>, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@gmail.com>, Ben Widawsky <benjamin.widawsky@intel.com> Subject: linux-next: manual merge of the drm tree with the drm-intel-fixes tree Date: Mon, 28 Oct 2013 16:46:09 +1100 [thread overview] Message-ID: <20131028164609.bdec95d18a41b59fc37fbae1@canb.auug.org.au> (raw) [-- Attachment #1: Type: text/plain, Size: 2957 bytes --] Hi Dave, Today's linux-next merge of the drm tree got a conflict in drivers/gpu/drm/i915/intel_dp.c between commit 0cc4b69960f3 ("drm/i915: Mask LPSP to get PSR working even with Power Well in use by audio") from Linus' tree and commit 52e1e223456e ("drm/i915/dp: workaround BIOS eDP bpp clamping issue") from the drm-intel-fixes tree and commits 18442d087864 ("drm/i915: Fix port_clock and adjusted_mode.clock readout all over") and 18b5992c3756 ("drm/i915: Calculate PSR register offsets from base + gen") from the drm tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). -- Cheers, Stephen Rothwell sfr@canb.auug.org.au diff --cc drivers/gpu/drm/i915/intel_dp.c index 1a431377d83b,1e3d2720d811..000000000000 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@@ -1402,31 -1469,20 +1469,40 @@@ static void intel_dp_get_config(struct pipe_config->port_clock = 270000; } + if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp && + pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) { + /* + * This is a big fat ugly hack. + * + * Some machines in UEFI boot mode provide us a VBT that has 18 + * bpp and 1.62 GHz link bandwidth for eDP, which for reasons + * unknown we fail to light up. Yet the same BIOS boots up with + * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as + * max, not what it tells us to use. + * + * Note: This will still be broken if the eDP panel is not lit + * up by the BIOS, and thus we can't get the mode at module + * load. + */ + DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n", + pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp); + dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp; + } ++ + dotclock = intel_dotclock_calculate(pipe_config->port_clock, + &pipe_config->dp_m_n); + + if (HAS_PCH_SPLIT(dev_priv->dev) && port != PORT_A) + ironlake_check_encoder_dotclock(pipe_config, dotclock); + + pipe_config->adjusted_mode.crtc_clock = dotclock; } - static bool is_edp_psr(struct intel_dp *intel_dp) + static bool is_edp_psr(struct drm_device *dev) { - return is_edp(intel_dp) && - intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED; + struct drm_i915_private *dev_priv = dev->dev_private; + + return dev_priv->psr.sink_support; } static bool intel_edp_is_psr_enabled(struct drm_device *dev) @@@ -1486,8 -1542,8 +1562,8 @@@ static void intel_edp_psr_setup(struct intel_edp_psr_write_vsc(intel_dp, &psr_vsc); /* Avoid continuous PSR exit by masking memup and hpd */ - I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | + I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP | - EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); + EDP_PSR_DEBUG_MASK_HPD); intel_dp->psr_setup_done = true; } [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
next reply other threads:[~2013-10-28 5:46 UTC|newest] Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-10-28 5:46 Stephen Rothwell [this message] 2013-10-28 5:46 ` linux-next: manual merge of the drm tree with the drm-intel-fixes tree Stephen Rothwell 2013-10-28 6:12 ` Stephen Rothwell 2013-10-28 6:12 ` Stephen Rothwell 2014-05-07 3:24 Stephen Rothwell 2014-05-22 5:40 Stephen Rothwell 2014-05-22 5:44 Stephen Rothwell 2014-07-09 4:06 Stephen Rothwell 2014-07-23 2:38 Stephen Rothwell 2014-07-23 2:38 ` Stephen Rothwell 2014-11-17 3:04 Stephen Rothwell 2014-11-17 3:04 ` Stephen Rothwell 2014-12-03 2:27 Stephen Rothwell 2014-12-03 2:27 ` Stephen Rothwell 2014-12-03 8:24 ` Jani Nikula 2014-12-03 8:24 ` Jani Nikula 2014-12-03 8:28 ` Stephen Rothwell 2015-03-16 2:30 Stephen Rothwell 2015-03-16 2:30 ` Stephen Rothwell 2015-03-16 13:43 ` Xi Ruoyao 2015-03-16 15:04 ` Jani Nikula 2015-06-05 5:46 mpe@ellerman.id.au 2015-06-05 8:03 ` Jani Nikula 2015-06-05 8:03 ` Jani Nikula 2015-06-09 1:58 ` Stephen Rothwell 2015-06-09 1:58 ` Stephen Rothwell 2015-08-17 3:23 Stephen Rothwell 2015-08-17 3:23 ` Stephen Rothwell 2015-12-03 14:47 Mark Brown 2015-12-03 14:52 ` Imre Deak 2015-12-03 14:51 Mark Brown 2015-12-03 15:49 ` Jani Nikula 2015-12-03 15:49 ` Jani Nikula 2015-12-09 2:35 Stephen Rothwell 2015-12-09 2:35 ` Stephen Rothwell 2015-12-22 23:06 Stephen Rothwell 2015-12-22 23:06 ` Stephen Rothwell 2016-06-14 2:10 Stephen Rothwell 2016-06-14 2:10 ` Stephen Rothwell 2017-03-21 0:28 Stephen Rothwell 2017-03-21 0:28 ` Stephen Rothwell 2017-03-21 23:57 Stephen Rothwell 2017-03-21 23:57 ` Stephen Rothwell 2017-03-22 0:00 Stephen Rothwell 2017-03-22 0:00 ` Stephen Rothwell 2017-03-27 17:14 ` Paul McKenney 2017-03-30 1:08 Stephen Rothwell 2017-03-30 1:08 ` Stephen Rothwell 2017-03-30 1:14 Stephen Rothwell 2017-06-08 2:53 Stephen Rothwell 2017-06-08 2:53 ` Stephen Rothwell 2017-06-09 2:26 Stephen Rothwell 2017-06-14 0:50 Stephen Rothwell 2017-06-14 0:56 Stephen Rothwell 2017-06-14 0:56 ` Stephen Rothwell 2017-07-21 1:26 Stephen Rothwell 2017-07-21 1:26 ` Stephen Rothwell 2018-01-05 1:00 Stephen Rothwell 2018-01-05 1:00 ` Stephen Rothwell 2019-10-31 0:33 Stephen Rothwell 2019-10-31 0:33 ` Stephen Rothwell 2019-11-08 0:42 ` Stephen Rothwell 2019-11-08 0:42 ` Stephen Rothwell 2019-11-08 0:42 ` Stephen Rothwell 2020-01-08 1:04 Stephen Rothwell 2020-01-08 1:04 ` Stephen Rothwell 2020-01-08 2:28 ` Stephen Rothwell 2020-01-08 2:28 ` Stephen Rothwell 2020-01-08 1:10 Stephen Rothwell 2020-01-08 1:10 ` Stephen Rothwell 2020-01-08 1:15 Stephen Rothwell 2020-01-08 1:15 ` Stephen Rothwell 2020-01-22 0:37 Stephen Rothwell 2020-01-22 0:37 ` Stephen Rothwell 2020-05-07 2:43 Stephen Rothwell 2020-05-07 2:43 ` Stephen Rothwell 2020-05-08 3:50 Stephen Rothwell 2020-05-08 3:50 ` Stephen Rothwell 2022-02-22 17:03 broonie 2022-02-22 17:03 ` broonie 2022-02-25 16:14 broonie 2022-02-25 16:14 ` broonie 2022-05-17 1:26 Stephen Rothwell 2022-05-17 1:26 ` Stephen Rothwell 2023-04-17 14:39 broonie 2023-04-17 14:39 ` broonie 2024-03-07 2:10 Stephen Rothwell 2024-03-07 8:27 ` Joonas Lahtinen
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20131028164609.bdec95d18a41b59fc37fbae1@canb.auug.org.au \ --to=sfr@canb.auug.org.au \ --cc=airlied@linux.ie \ --cc=benjamin.widawsky@intel.com \ --cc=daniel.vetter@ffwll.ch \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ --cc=jani.nikula@intel.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-next@vger.kernel.org \ --cc=rodrigo.vivi@gmail.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.