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From: Liviu Dudau <Liviu.Dudau@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
	Mark Rutland <Mark.Rutland@arm.com>,
	Rob Herring <robherring2@gmail.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Will Deacon <Will.Deacon@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
Date: Thu, 27 Nov 2014 15:33:21 +0000	[thread overview]
Message-ID: <20141127153321.GQ828@e106497-lin.cambridge.arm.com> (raw)
In-Reply-To: <5477389A.8010606@arm.com>

On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> > 
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> > 
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > ---
> > 
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> > 
> >  arch/arm64/boot/dts/arm/foundation-v8.dts  | 8 ++++----
> >  arch/arm64/boot/dts/arm/juno.dts           | 8 ++++----
> >  arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> >  3 files changed, 12 insertions(+), 12 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <1 13 0xff01>,
> > -			     <1 14 0xff01>,
> > -			     <1 11 0xff01>,
> > -			     <1 10 0xff01>;
> > +		interrupts = <1 13 0xf08>,
> > +			     <1 14 0xf08>,
> > +			     <1 11 0xf08>,
> > +			     <1 10 0xf08>;
> >  		clock-frequency = <100000000>;
> >  	};
> >  
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> >  	};
> >  
> >  	pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <1 13 0xff01>,
> > -			     <1 14 0xff01>,
> > -			     <1 11 0xff01>,
> > -			     <1 10 0xff01>;
> > +		interrupts = <1 13 0xf08>,
> > +			     <1 14 0xf08>,
> > +			     <1 11 0xf08>,
> > +			     <1 10 0xf08>;
> >  		clock-frequency = <100000000>;
> >  	};
> >  
> > 
> 
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.

Hah, one can never read enough specs to get the right answer!

I'll update the patch.

Best regards,
Liviu

> 
> 	M.
> -- 
> Jazz is not dead. It just smells funny...
> 

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ¯\_(ツ)_/¯


WARNING: multiple messages have this Message-ID (diff)
From: Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
To: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
Cc: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
	Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>,
	Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org>,
	Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Ian Campbell
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
Date: Thu, 27 Nov 2014 15:33:21 +0000	[thread overview]
Message-ID: <20141127153321.GQ828@e106497-lin.cambridge.arm.com> (raw)
In-Reply-To: <5477389A.8010606-5wv7dgnIgG8@public.gmane.org>

On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> > 
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> > 
> > Signed-off-by: Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>
> > ---
> > 
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> > 
> >  arch/arm64/boot/dts/arm/foundation-v8.dts  | 8 ++++----
> >  arch/arm64/boot/dts/arm/juno.dts           | 8 ++++----
> >  arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> >  3 files changed, 12 insertions(+), 12 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <1 13 0xff01>,
> > -			     <1 14 0xff01>,
> > -			     <1 11 0xff01>,
> > -			     <1 10 0xff01>;
> > +		interrupts = <1 13 0xf08>,
> > +			     <1 14 0xf08>,
> > +			     <1 11 0xf08>,
> > +			     <1 10 0xf08>;
> >  		clock-frequency = <100000000>;
> >  	};
> >  
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> >  	};
> >  
> >  	pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <1 13 0xff01>,
> > -			     <1 14 0xff01>,
> > -			     <1 11 0xff01>,
> > -			     <1 10 0xff01>;
> > +		interrupts = <1 13 0xf08>,
> > +			     <1 14 0xf08>,
> > +			     <1 11 0xf08>,
> > +			     <1 10 0xf08>;
> >  		clock-frequency = <100000000>;
> >  	};
> >  
> > 
> 
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.

Hah, one can never read enough specs to get the right answer!

I'll update the patch.

Best regards,
Liviu

> 
> 	M.
> -- 
> Jazz is not dead. It just smells funny...
> 

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ¯\_(ツ)_/¯

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WARNING: multiple messages have this Message-ID (diff)
From: Liviu.Dudau@arm.com (Liviu Dudau)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description
Date: Thu, 27 Nov 2014 15:33:21 +0000	[thread overview]
Message-ID: <20141127153321.GQ828@e106497-lin.cambridge.arm.com> (raw)
In-Reply-To: <5477389A.8010606@arm.com>

On Thu, Nov 27, 2014 at 02:43:38PM +0000, Marc Zyngier wrote:
> On 27/11/14 14:36, Liviu Dudau wrote:
> > The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
> > description" that generic timers provide an active-LOW interrupt
> > output. Fix the device trees to correctly describe this.
> > 
> > While doing this update the CPU mask to match the number of described
> > CPUs as well.
> > 
> > Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > ---
> > 
> > Arnd, Olof: This is on top of linux-next/master as it patches the Juno
> > as well as all the other ARM DTs.
> > 
> >  arch/arm64/boot/dts/arm/foundation-v8.dts  | 8 ++++----
> >  arch/arm64/boot/dts/arm/juno.dts           | 8 ++++----
> >  arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 8 ++++----
> >  3 files changed, 12 insertions(+), 12 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > index 4a06090..27f3296 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> > @@ -78,10 +78,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <1 13 0xff01>,
> > -			     <1 14 0xff01>,
> > -			     <1 11 0xff01>,
> > -			     <1 10 0xff01>;
> > +		interrupts = <1 13 0xf08>,
> > +			     <1 14 0xf08>,
> > +			     <1 11 0xf08>,
> > +			     <1 10 0xf08>;
> >  		clock-frequency = <100000000>;
> >  	};
> >  
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
> > index 097ecc4..cb3073e 100644
> > --- a/arch/arm64/boot/dts/arm/juno.dts
> > +++ b/arch/arm64/boot/dts/arm/juno.dts
> > @@ -98,10 +98,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>,
> > -			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_EDGE_RISING)>;
> > +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> >  	};
> >  
> >  	pmu {
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > index 572005e..efc59b3 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> > @@ -81,10 +81,10 @@
> >  
> >  	timer {
> >  		compatible = "arm,armv8-timer";
> > -		interrupts = <1 13 0xff01>,
> > -			     <1 14 0xff01>,
> > -			     <1 11 0xff01>,
> > -			     <1 10 0xff01>;
> > +		interrupts = <1 13 0xf08>,
> > +			     <1 14 0xf08>,
> > +			     <1 11 0xf08>,
> > +			     <1 10 0xf08>;
> >  		clock-frequency = <100000000>;
> >  	};
> >  
> > 
> 
> Sorry, but that's wrong. Despite the *cores* having an level-low output,
> the GIC only triggers on *level-high*. Yes, there is probably an
> inverter in between.

Hah, one can never read enough specs to get the right answer!

I'll update the patch.

Best regards,
Liviu

> 
> 	M.
> -- 
> Jazz is not dead. It just smells funny...
> 

-- 
====================
| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---------------
    ?\_(?)_/?

  reply	other threads:[~2014-11-27 15:33 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-27 14:36 [PATCH] arm64: ARM: Fix the Generic Timers interrupt active level description Liviu Dudau
2014-11-27 14:36 ` Liviu Dudau
2014-11-27 14:36 ` Liviu Dudau
2014-11-27 14:43 ` Marc Zyngier
2014-11-27 14:43   ` Marc Zyngier
2014-11-27 14:43   ` Marc Zyngier
2014-11-27 15:33   ` Liviu Dudau [this message]
2014-11-27 15:33     ` Liviu Dudau
2014-11-27 15:33     ` Liviu Dudau
2014-11-27 15:34   ` Liviu Dudau
2014-11-27 15:34     ` Liviu Dudau
2014-11-27 15:34     ` Liviu Dudau
2014-11-27 15:48     ` Marc Zyngier
2014-11-27 15:48       ` Marc Zyngier
2014-11-27 15:48       ` Marc Zyngier
2014-11-28 11:50 ` Liviu Dudau
2014-11-28 11:50   ` Liviu Dudau
2014-11-28 11:50   ` Liviu Dudau
2014-11-28 21:38 ` Arnd Bergmann
2014-11-28 21:38   ` Arnd Bergmann
2014-11-28 21:38   ` Arnd Bergmann

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