Re: [PATCH v4 0/5] ARM: sun9i: Add USB host controller support for A80

From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Grant Likely <grant.likely@linaro.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH v4 0/5] ARM: sun9i: Add USB host controller support for A80
Date: Sat, 7 Feb 2015 16:44:09 +0100	[thread overview]
Message-ID: <20150207154409.GS2079@lukather> (raw)
In-Reply-To: <1422915725-26492-1-git-send-email-wens@csie.org>

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On Tue, Feb 03, 2015 at 06:22:00AM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
> 
> This is v4 of the sun9i A80 USB host support series.
> 
> Changes since v3:
> 
>   - Dropped patches merged.
> 
>   - Moved reg_usb3_vbus into the optimus board dts
> 
>   - Dropped ohci1 from A80 dtsi.
> 
> Cover letter from v3:
> 
> This series adds USB host controller (EHCI/OHCI) support for the Allwinner
> A80 SoC. The A80 has 3 pairs of host controllers and USB PHYs. The PHYs,
> unlike in previous SoCs, do not have low level control registers anymore.
> 
> As such, this series forgoes the original phy-sun4i-usb driver, and adds
> a new, simpler driver for the USB PHYs. It may be possible to merge the
> two, but given that work is being done on the OTG front for the earlier
> SoCs, it may be better to merge them after support is complete.
> 
> EHCI/OHCI0 corresponds to USB1 DP/DM pins; EHCI1 only has HSIC support;
> EHCI2/OHCI/2 is USB2 DP/DM externally. External pins labeled USB0 are
> for the USB 3.0 OTG controller.

Applied 2-5.

Thanks!

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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