From: Mark Rutland <mark.rutland@arm.com> To: Ray Jui <rjui@broadcom.com> Cc: Catalin Marinas <Catalin.Marinas@arm.com>, Will Deacon <Will.Deacon@arm.com>, Arnd Bergmann <arnd@arndb.de>, Bjorn Helgaas <bhelgaas@google.com>, Hauke Mehrtens <hauke@hauke-m.de>, Jon Mason <jonmason@broadcom.com>, "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "bcm-kernel-feedback-list@broadcom.com" <bcm-kernel-feedback-list@broadcom.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH 4/4] arm64: dts: Add Broadcom North Star 2 support Date: Tue, 14 Jul 2015 10:23:53 +0100 [thread overview] Message-ID: <20150714092353.GA12675@leverpostej> (raw) In-Reply-To: <1436837955-26279-5-git-send-email-rjui@broadcom.com> Hi, > +/dts-v1/; > + > +#include "ns2.dtsi" > + > +/ { > + model = "Broadcom NS2 SVK"; > + compatible = "brcm,ns2-svk", "brcm,ns2"; > + > + chosen { > + bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x66130000"; > + }; Please use stdout-path instead (you can use /aliases to make it simpler). It'll save a redundant description of the UART and will remove the dependency on Linux-specific naming of the UART. [...] > +/ { > + compatible = "brcm,ns2"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <2>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57", "arm,armv8"; > + reg = <0 0>; > + enable-method = "spin-table"; > + cpu-release-addr = <0 0x84b00000>; > + }; > + }; Shouldn't the other CPUs be described? Using spin-table for SMP is somewhat unfortunate, as it comes with a number of problems (e.g. unwoken secondaries spinning in the kernel). I would strongly advise using PSCI instead. > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 11 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 10 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>; > + clock-frequency = <25000000>; > + }; Please fix your firmware to configure CNTFRQ_EL0, it is simply a bug not to, and using clock-frequency does not fix all the problems that not configuring it causes. Thanks, Mark.
WARNING: multiple messages have this Message-ID (diff)
From: mark.rutland@arm.com (Mark Rutland) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/4] arm64: dts: Add Broadcom North Star 2 support Date: Tue, 14 Jul 2015 10:23:53 +0100 [thread overview] Message-ID: <20150714092353.GA12675@leverpostej> (raw) In-Reply-To: <1436837955-26279-5-git-send-email-rjui@broadcom.com> Hi, > +/dts-v1/; > + > +#include "ns2.dtsi" > + > +/ { > + model = "Broadcom NS2 SVK"; > + compatible = "brcm,ns2-svk", "brcm,ns2"; > + > + chosen { > + bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x66130000"; > + }; Please use stdout-path instead (you can use /aliases to make it simpler). It'll save a redundant description of the UART and will remove the dependency on Linux-specific naming of the UART. [...] > +/ { > + compatible = "brcm,ns2"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <2>; > + #size-cells = <0>; > + > + cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a57", "arm,armv8"; > + reg = <0 0>; > + enable-method = "spin-table"; > + cpu-release-addr = <0 0x84b00000>; > + }; > + }; Shouldn't the other CPUs be described? Using spin-table for SMP is somewhat unfortunate, as it comes with a number of problems (e.g. unwoken secondaries spinning in the kernel). I would strongly advise using PSCI instead. > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 11 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 10 (GIC_CPU_MASK_RAW(0xff) | > + IRQ_TYPE_EDGE_RISING)>; > + clock-frequency = <25000000>; > + }; Please fix your firmware to configure CNTFRQ_EL0, it is simply a bug not to, and using clock-frequency does not fix all the problems that not configuring it causes. Thanks, Mark.
next prev parent reply other threads:[~2015-07-14 9:24 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-07-14 1:39 [PATCH 0/4] Add Broadcom North Star 2 support Ray Jui 2015-07-14 1:39 ` Ray Jui 2015-07-14 1:39 ` [PATCH 1/4] PCI: iproc: enable arm64 support for iProc PCIe Ray Jui 2015-07-14 1:39 ` Ray Jui 2015-07-14 1:39 ` [PATCH 2/4] PCI: iproc: Fix ARM64 dependency in Kconfig Ray Jui 2015-07-14 1:39 ` Ray Jui 2015-07-14 1:39 ` [PATCH 3/4] arm64: Add Broadcom's North Star 2 support Ray Jui 2015-07-14 1:39 ` Ray Jui 2015-07-14 9:14 ` Catalin Marinas 2015-07-14 9:14 ` Catalin Marinas 2015-07-14 21:11 ` Ray Jui 2015-07-14 21:11 ` Ray Jui 2015-07-14 1:39 ` [PATCH 4/4] arm64: dts: Add Broadcom " Ray Jui 2015-07-14 1:39 ` Ray Jui 2015-07-14 9:23 ` Mark Rutland [this message] 2015-07-14 9:23 ` Mark Rutland 2015-07-14 9:23 ` Mark Rutland 2015-07-14 21:20 ` Ray Jui 2015-07-14 21:20 ` Ray Jui 2015-07-14 21:20 ` Ray Jui 2015-07-14 21:01 ` Arnd Bergmann 2015-07-14 21:01 ` Arnd Bergmann
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