Re: [PATCH] drm/i915: Split sink_crc function in start, stop and read.

From: Daniel Vetter <daniel@ffwll.ch>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Split sink_crc function in start, stop and read.
Date: Wed, 5 Aug 2015 10:07:14 +0200	[thread overview]
Message-ID: <20150805080713.GB17734@phenom.ffwll.local> (raw)
In-Reply-To: <1438298799-4024-1-git-send-email-rodrigo.vivi@intel.com>

On Thu, Jul 30, 2015 at 04:26:39PM -0700, Rodrigo Vivi wrote:
> This is just a preparation patch to make clear what operation we
> are performing. There is no functional change on the sink crc
> logic.
> 
> hsw_disable_ips has been moved a bit further in the start function
> to avoid disabling ips when sink crc is not going to be started.
> and to avoid goto on this function.
> 
> v2: explain why hsw_disable_ips() call place has changed.
> 
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Thanks for the updated commit message. Queued for -next, thanks for the
patch.
-Daniel
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 89 +++++++++++++++++++++++------------------
>  1 file changed, 50 insertions(+), 39 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 44f8a32..10cbc98 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3958,40 +3958,64 @@ intel_dp_probe_mst(struct intel_dp *intel_dp)
>  	return intel_dp->is_mst;
>  }
>  
> -int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> +static void intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
>  {
> -	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_device *dev = intel_dig_port->base.base.dev;
> -	struct intel_crtc *intel_crtc =
> -		to_intel_crtc(intel_dig_port->base.base.crtc);
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
>  	u8 buf;
> -	int test_crc_count;
> -	int attempts = 6;
> -	int ret = 0;
> -
> -	hsw_disable_ips(intel_crtc);
>  
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) {
> -		ret = -EIO;
> -		goto out;
> +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) {
> +		DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
> +		return;
>  	}
>  
> -	if (!(buf & DP_TEST_CRC_SUPPORTED)) {
> -		ret = -ENOTTY;
> -		goto out;
> -	}
> +	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
> +			       buf & ~DP_TEST_SINK_START) < 0)
> +		DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
>  
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) {
> -		ret = -EIO;
> -		goto out;
> -	}
> +	hsw_enable_ips(intel_crtc);
> +}
> +
> +static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
> +{
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
> +	u8 buf;
> +
> +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0)
> +		return -EIO;
> +
> +	if (!(buf & DP_TEST_CRC_SUPPORTED))
> +		return -ENOTTY;
> +
> +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0)
> +		return -EIO;
> +
> +	hsw_disable_ips(intel_crtc);
>  
>  	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
> -				buf | DP_TEST_SINK_START) < 0) {
> -		ret = -EIO;
> -		goto out;
> +			       buf | DP_TEST_SINK_START) < 0) {
> +		hsw_enable_ips(intel_crtc);
> +		return -EIO;
>  	}
>  
> +	return 0;
> +}
> +
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> +{
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	struct drm_device *dev = dig_port->base.base.dev;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
> +	u8 buf;
> +	int test_crc_count;
> +	int attempts = 6;
> +	int ret;
> +
> +	ret = intel_dp_sink_crc_start(intel_dp);
> +	if (ret)
> +		return ret;
> +
>  	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) {
>  		ret = -EIO;
>  		goto stop;
> @@ -4014,23 +4038,10 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
>  		goto stop;
>  	}
>  
> -	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0) {
> +	if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
>  		ret = -EIO;
> -		goto stop;
> -	}
> -
>  stop:
> -	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) {
> -		DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
> -		goto out;
> -	}
> -	if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
> -			       buf & ~DP_TEST_SINK_START) < 0) {
> -		DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
> -		goto out;
> -	}
> -out:
> -	hsw_enable_ips(intel_crtc);
> +	intel_dp_sink_crc_stop(intel_dp);
>  	return ret;
>  }
>  
> -- 
> 2.1.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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