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From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
	Maxime Ripard <maxime.ripard@free-electrons.com>,
	Chen-Yu Tsai <wens@csie.org>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
	Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64
Date: Wed,  5 Apr 2017 20:50:53 +0800	[thread overview]
Message-ID: <20170405125053.6170-4-icenowy@aosc.io> (raw)
In-Reply-To: <20170405125053.6170-1-icenowy@aosc.io>

The upper USB port of Pine64 board is connected to the SoC's USB0 port,
which can now switch from the MUSB controller to the EHCI/OHCI pair.

Enable the EHCI/OHCI pair in the Pine64 device tree.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index c680ed385da3..4782add50b94 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -66,6 +66,10 @@
 	};
 };
 
+&ehci0 {
+	status = "okay";
+};
+
 &ehci1 {
 	status = "okay";
 };
@@ -91,6 +95,10 @@
 	status = "okay";
 };
 
+&ohci0 {
+	status = "okay";
+};
+
 &ohci1 {
 	status = "okay";
 };
-- 
2.12.2

WARNING: multiple messages have this Message-ID (diff)
From: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Subject: [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64
Date: Wed,  5 Apr 2017 20:50:53 +0800	[thread overview]
Message-ID: <20170405125053.6170-4-icenowy@aosc.io> (raw)
In-Reply-To: <20170405125053.6170-1-icenowy-h8G6r0blFSE@public.gmane.org>

The upper USB port of Pine64 board is connected to the SoC's USB0 port,
which can now switch from the MUSB controller to the EHCI/OHCI pair.

Enable the EHCI/OHCI pair in the Pine64 device tree.

Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index c680ed385da3..4782add50b94 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -66,6 +66,10 @@
 	};
 };
 
+&ehci0 {
+	status = "okay";
+};
+
 &ehci1 {
 	status = "okay";
 };
@@ -91,6 +95,10 @@
 	status = "okay";
 };
 
+&ohci0 {
+	status = "okay";
+};
+
 &ohci1 {
 	status = "okay";
 };
-- 
2.12.2

WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.io (Icenowy Zheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64
Date: Wed,  5 Apr 2017 20:50:53 +0800	[thread overview]
Message-ID: <20170405125053.6170-4-icenowy@aosc.io> (raw)
In-Reply-To: <20170405125053.6170-1-icenowy@aosc.io>

The upper USB port of Pine64 board is connected to the SoC's USB0 port,
which can now switch from the MUSB controller to the EHCI/OHCI pair.

Enable the EHCI/OHCI pair in the Pine64 device tree.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index c680ed385da3..4782add50b94 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -66,6 +66,10 @@
 	};
 };
 
+&ehci0 {
+	status = "okay";
+};
+
 &ehci1 {
 	status = "okay";
 };
@@ -91,6 +95,10 @@
 	status = "okay";
 };
 
+&ohci0 {
+	status = "okay";
+};
+
 &ohci1 {
 	status = "okay";
 };
-- 
2.12.2

  parent reply	other threads:[~2017-04-05 12:52 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-05 12:50 [PATCH 0/3] Allwinner A64 EHCI0/OHCI0 devicetree change Icenowy Zheng
2017-04-05 12:50 ` Icenowy Zheng
2017-04-05 12:50 ` Icenowy Zheng
2017-04-05 12:50 ` [PATCH 1/3] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 Icenowy Zheng
2017-04-05 12:50   ` Icenowy Zheng
2017-04-05 12:50   ` Icenowy Zheng
2017-04-05 12:58   ` Kishon Vijay Abraham I
2017-04-05 12:58     ` Kishon Vijay Abraham I
2017-04-05 12:58     ` Kishon Vijay Abraham I
2017-04-05 16:13     ` Chen-Yu Tsai
2017-04-05 16:13       ` Chen-Yu Tsai
2017-04-05 16:13       ` Chen-Yu Tsai
2017-04-05 12:50 ` [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts Icenowy Zheng
2017-04-05 12:50   ` Icenowy Zheng
2017-04-05 12:50   ` Icenowy Zheng
2017-04-05 13:05   ` Maxime Ripard
2017-04-05 13:05     ` Maxime Ripard
2017-04-05 13:05     ` Maxime Ripard
2017-04-05 12:50 ` Icenowy Zheng [this message]
2017-04-05 12:50   ` [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64 Icenowy Zheng
2017-04-05 12:50   ` Icenowy Zheng
  -- strict thread matches above, loose matches on Subject: below --
2017-04-04 18:45 [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Icenowy Zheng
2017-04-04 18:45 ` [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64 Icenowy Zheng
2017-04-04 18:45   ` Icenowy Zheng
2017-04-04 18:45   ` Icenowy Zheng

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