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From: Mark Brown <broonie@kernel.org>
To: Doug Anderson <dianders@chromium.org>
Cc: "Jeffy Chen" <jeffy.chen@rock-chips.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Brian Norris" <briannorris@chromium.org>,
	"Heiko Stübner" <heiko@sntech.de>,
	linux-spi <linux-spi@vger.kernel.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 2/2] spi: rockchip: Disable Runtime PM when chip select is asserted
Date: Wed, 28 Jun 2017 19:42:28 +0100	[thread overview]
Message-ID: <20170628184228.qdj7oslnljv6e2iy@sirena.org.uk> (raw)
In-Reply-To: <CAD=FV=UzDHfTNJgs8vvbKGd0RpY__Q9V27aSQiR5ugv6ff5gfQ@mail.gmail.com>

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On Tue, Jun 27, 2017 at 10:30:10PM -0700, Doug Anderson wrote:
> Jeffy,
> 
> On Tue, Jun 27, 2017 at 9:38 PM, Jeffy Chen <jeffy.chen@rock-chips.com> wrote:
> > The rockchip spi would stop driving pins when runtime suspended, which
> > might break slave's xfer(for example cros_ec).

Please delete unneeded context from mails when replying.  Doing this
makes it much easier to find your reply in the message, helping ensure
it won't be missed by people scrolling through the irrelevant quoted
material.

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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: "Jeffy Chen" <jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"Brian Norris"
	<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	"Heiko Stübner" <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	linux-spi <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH v3 2/2] spi: rockchip: Disable Runtime PM when chip select is asserted
Date: Wed, 28 Jun 2017 19:42:28 +0100	[thread overview]
Message-ID: <20170628184228.qdj7oslnljv6e2iy@sirena.org.uk> (raw)
In-Reply-To: <CAD=FV=UzDHfTNJgs8vvbKGd0RpY__Q9V27aSQiR5ugv6ff5gfQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

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On Tue, Jun 27, 2017 at 10:30:10PM -0700, Doug Anderson wrote:
> Jeffy,
> 
> On Tue, Jun 27, 2017 at 9:38 PM, Jeffy Chen <jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> wrote:
> > The rockchip spi would stop driving pins when runtime suspended, which
> > might break slave's xfer(for example cros_ec).

Please delete unneeded context from mails when replying.  Doing this
makes it much easier to find your reply in the message, helping ensure
it won't be missed by people scrolling through the irrelevant quoted
material.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: broonie@kernel.org (Mark Brown)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/2] spi: rockchip: Disable Runtime PM when chip select is asserted
Date: Wed, 28 Jun 2017 19:42:28 +0100	[thread overview]
Message-ID: <20170628184228.qdj7oslnljv6e2iy@sirena.org.uk> (raw)
In-Reply-To: <CAD=FV=UzDHfTNJgs8vvbKGd0RpY__Q9V27aSQiR5ugv6ff5gfQ@mail.gmail.com>

On Tue, Jun 27, 2017 at 10:30:10PM -0700, Doug Anderson wrote:
> Jeffy,
> 
> On Tue, Jun 27, 2017 at 9:38 PM, Jeffy Chen <jeffy.chen@rock-chips.com> wrote:
> > The rockchip spi would stop driving pins when runtime suspended, which
> > might break slave's xfer(for example cros_ec).

Please delete unneeded context from mails when replying.  Doing this
makes it much easier to find your reply in the message, helping ensure
it won't be missed by people scrolling through the irrelevant quoted
material.
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  reply	other threads:[~2017-06-28 18:42 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-28  4:38 [PATCH v3 1/2] spi: rockchip: Set GPIO_SS flag to enable Slave Select with GPIO CS Jeffy Chen
2017-06-28  4:38 ` Jeffy Chen
2017-06-28  4:38 ` Jeffy Chen
2017-06-28  4:38 ` [PATCH v3 2/2] spi: rockchip: Disable Runtime PM when chip select is asserted Jeffy Chen
2017-06-28  4:38   ` Jeffy Chen
2017-06-28  4:38   ` Jeffy Chen
2017-06-28  5:30   ` Doug Anderson
2017-06-28  5:30     ` Doug Anderson
2017-06-28  5:30     ` Doug Anderson
2017-06-28 18:42     ` Mark Brown [this message]
2017-06-28 18:42       ` Mark Brown
2017-06-28 18:42       ` Mark Brown
2017-06-28 19:25   ` Applied "spi: rockchip: Disable Runtime PM when chip select is asserted" to the spi tree Mark Brown
2017-06-28 19:25     ` Mark Brown
2017-06-28 19:25     ` Mark Brown
2017-06-28 19:25     ` Mark Brown
2017-06-28  5:38 ` [PATCH v3 1/2] spi: rockchip: Set GPIO_SS flag to enable Slave Select with GPIO CS Doug Anderson
2017-06-28  5:38   ` Doug Anderson
2017-06-28  5:38   ` Doug Anderson
2017-06-28 19:26 ` Applied "spi: rockchip: Set GPIO_SS flag to enable Slave Select with GPIO CS" to the spi tree Mark Brown
2017-06-28 19:26   ` Mark Brown
2017-06-28 19:26   ` Mark Brown
2017-06-28 19:26   ` Mark Brown

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