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From: Wu Hao <hao.wu@intel.com>
To: Alan Tull <atull@kernel.org>
Cc: Moritz Fischer <mdf@kernel.org>,
	linux-fpga@vger.kernel.org,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-api@vger.kernel.org, "Kang, Luwei" <luwei.kang@intel.com>,
	"Zhang, Yi Z" <yi.z.zhang@intel.com>
Subject: Re: [PATCH v2 05/22] fpga: mgr: add status for fpga-mgr
Date: Thu, 13 Jul 2017 11:11:51 +0800	[thread overview]
Message-ID: <20170713031151.GB28569@hao-dev> (raw)
In-Reply-To: <CANk1AXQ4-BWzhRjR+BTmnSae+4FeBamZyYbH1MMZWaAqeW_CEA@mail.gmail.com>

On Wed, Jul 12, 2017 at 10:22:17AM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao.wu@intel.com> wrote:
> 
> Hi Hao,
> 

Hi Alan

Thanks a lot for your feedback. : )

> > This patch adds status to fpga-manager data structure, to allow
> > driver to store full/partial reconfiguration errors and other
> > status information.
> >
> > one sysfs interface created for user space application to read
> > fpga-manager status.
> >
> > Signed-off-by: Wu Hao <hao.wu@intel.com>
> > ---
> >  Documentation/ABI/testing/sysfs-class-fpga-manager | 10 +++++++++
> >  drivers/fpga/fpga-mgr.c                            | 24 ++++++++++++++++++++++
> >  include/linux/fpga/fpga-mgr.h                      |  9 ++++++++
> >  3 files changed, 43 insertions(+)
> >
> > diff --git a/Documentation/ABI/testing/sysfs-class-fpga-manager b/Documentation/ABI/testing/sysfs-class-fpga-manager
> > index 23056c5..71b083e 100644
> > --- a/Documentation/ABI/testing/sysfs-class-fpga-manager
> > +++ b/Documentation/ABI/testing/sysfs-class-fpga-manager
> > @@ -35,3 +35,13 @@ Description: Read fpga manager state as a string.
> >                 * write complete        = Doing post programming steps
> >                 * write complete error  = Error while doing post programming
> >                 * operating             = FPGA is programmed and operating
> > +
> > +What:          /sys/class/fpga_manager/<fpga>/status
> > +Date:          June 2017
> > +KernelVersion: 4.12
> > +Contact:       Wu Hao <hao.wu@intel.com>
> > +Description:   Read fpga manager status as a string.
> > +               If FPGA programming operation fails, it could be due to crc
> > +               error or incompatible bitstream image. The intent of this
> > +               interface is to provide more detailed information for FPGA
> > +               programming errors to userspace.
> > diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
> > index be13cce..2485658 100644
> > --- a/drivers/fpga/fpga-mgr.c
> > +++ b/drivers/fpga/fpga-mgr.c
> > @@ -388,12 +388,36 @@ static ssize_t state_show(struct device *dev,
> >         return sprintf(buf, "%s\n", state_str[mgr->state]);
> >  }
> >
> > +static ssize_t status_show(struct device *dev,
> > +                          struct device_attribute *attr, char *buf)
> > +{
> > +       struct fpga_manager *mgr = to_fpga_manager(dev);
> > +       int len = 0;
> > +
> > +       if (mgr->status & FPGA_MGR_STATUS_OPERATION_ERR)
> > +               len += sprintf(buf + len, "reconfig operation error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_CRC_ERR)
> > +               len += sprintf(buf + len, "reconfig crc error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_INCOMPATIBLE_BS_ERR)
> > +               len += sprintf(buf + len, "reconfig incompatible BS error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
> > +               len += sprintf(buf + len, "reconfig IP protocol error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
> > +               len += sprintf(buf + len, "reconfig fifo overflow error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_SECURE_LOAD_ERR)
> > +               len += sprintf(buf + len, "reconfig secure load error\n");
> > +
> > +       return len;
> > +}
> > +
> >  static DEVICE_ATTR_RO(name);
> >  static DEVICE_ATTR_RO(state);
> > +static DEVICE_ATTR_RO(status);
> >
> >  static struct attribute *fpga_mgr_attrs[] = {
> >         &dev_attr_name.attr,
> >         &dev_attr_state.attr,
> > +       &dev_attr_status.attr,
> >         NULL,
> >  };
> >  ATTRIBUTE_GROUPS(fpga_mgr);
> > diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
> > index b222a57..8cb42ac 100644
> > --- a/include/linux/fpga/fpga-mgr.h
> > +++ b/include/linux/fpga/fpga-mgr.h
> > @@ -128,6 +128,14 @@ struct fpga_manager_ops {
> >         void (*fpga_remove)(struct fpga_manager *mgr);
> >  };
> >
> > +/* FPGA manager status: Partial/Full Reconfiguration errors */
> > +#define FPGA_MGR_STATUS_OPERATION_ERR          BIT(0)
> > +#define FPGA_MGR_STATUS_CRC_ERR                        BIT(1)
> > +#define FPGA_MGR_STATUS_INCOMPATIBLE_BS_ERR    BIT(2)
> 
> How about ..._INCOMPATIBLE_IMAGE_ERR? :)

Hm.. It sounds better to me. : )
Will change it in next version patch set.

> 
> > +#define FPGA_MGR_STATUS_IP_PROTOCOL_ERR                BIT(3)
> > +#define FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR      BIT(4)
> > +#define FPGA_MGR_STATUS_SECURE_LOAD_ERR                BIT(5)
> > +
> >  /**
> >   * struct fpga_manager - fpga manager structure
> >   * @name: name of low level fpga manager
> > @@ -142,6 +150,7 @@ struct fpga_manager {
> >         struct device dev;
> >         struct mutex ref_mutex;
> >         enum fpga_mgr_states state;
> > +       u64 status;
> 
> With this implementation, the low level driver sets ops->status and
> that could be stale by the time the framework looks at it.  I suggest
> adding a function to fpga_manager_ops that returns the status.  That
> way whenever the status is requested, the low level driver will have
> the opportunity to read status registers.
> 
> Besides this, this new sysfs looks helpful.

I get your point, then I will add one member to fpga_manager_ops.

@@ -118,6 +118,7 @@ struct fpga_image_info {
 struct fpga_manager_ops {
        size_t initial_header_size;
        enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
+       u64 (*status)(struct fpga_manager *mgr);
        int (*write_init)(struct fpga_manager *mgr,
                          struct fpga_image_info *info,
                          const char *buf, size_t count);


and add common action to get status (pr error) in complete function.

@@ -139,6 +139,8 @@ static int fpga_mgr_write_complete(struct fpga_manager *mgr,
        if (ret) {
                dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
                mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
+               if (mgr->mops->status)
+                       mgr->status = mgr->mops->status(mgr);
                return ret;
        }
        mgr->state = FPGA_MGR_STATE_OPERATING;

after status is updated, then user could read it from the sysfs interface.

How do you think about this?

Thanks
Hao

WARNING: multiple messages have this Message-ID (diff)
From: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
To: Alan Tull <atull-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Moritz Fischer <mdf-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	linux-fpga-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	linux-api-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, "Kang,
	Luwei" <luwei.kang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"Zhang,
	Yi Z" <yi.z.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH v2 05/22] fpga: mgr: add status for fpga-mgr
Date: Thu, 13 Jul 2017 11:11:51 +0800	[thread overview]
Message-ID: <20170713031151.GB28569@hao-dev> (raw)
In-Reply-To: <CANk1AXQ4-BWzhRjR+BTmnSae+4FeBamZyYbH1MMZWaAqeW_CEA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On Wed, Jul 12, 2017 at 10:22:17AM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> wrote:
> 
> Hi Hao,
> 

Hi Alan

Thanks a lot for your feedback. : )

> > This patch adds status to fpga-manager data structure, to allow
> > driver to store full/partial reconfiguration errors and other
> > status information.
> >
> > one sysfs interface created for user space application to read
> > fpga-manager status.
> >
> > Signed-off-by: Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
> > ---
> >  Documentation/ABI/testing/sysfs-class-fpga-manager | 10 +++++++++
> >  drivers/fpga/fpga-mgr.c                            | 24 ++++++++++++++++++++++
> >  include/linux/fpga/fpga-mgr.h                      |  9 ++++++++
> >  3 files changed, 43 insertions(+)
> >
> > diff --git a/Documentation/ABI/testing/sysfs-class-fpga-manager b/Documentation/ABI/testing/sysfs-class-fpga-manager
> > index 23056c5..71b083e 100644
> > --- a/Documentation/ABI/testing/sysfs-class-fpga-manager
> > +++ b/Documentation/ABI/testing/sysfs-class-fpga-manager
> > @@ -35,3 +35,13 @@ Description: Read fpga manager state as a string.
> >                 * write complete        = Doing post programming steps
> >                 * write complete error  = Error while doing post programming
> >                 * operating             = FPGA is programmed and operating
> > +
> > +What:          /sys/class/fpga_manager/<fpga>/status
> > +Date:          June 2017
> > +KernelVersion: 4.12
> > +Contact:       Wu Hao <hao.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
> > +Description:   Read fpga manager status as a string.
> > +               If FPGA programming operation fails, it could be due to crc
> > +               error or incompatible bitstream image. The intent of this
> > +               interface is to provide more detailed information for FPGA
> > +               programming errors to userspace.
> > diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
> > index be13cce..2485658 100644
> > --- a/drivers/fpga/fpga-mgr.c
> > +++ b/drivers/fpga/fpga-mgr.c
> > @@ -388,12 +388,36 @@ static ssize_t state_show(struct device *dev,
> >         return sprintf(buf, "%s\n", state_str[mgr->state]);
> >  }
> >
> > +static ssize_t status_show(struct device *dev,
> > +                          struct device_attribute *attr, char *buf)
> > +{
> > +       struct fpga_manager *mgr = to_fpga_manager(dev);
> > +       int len = 0;
> > +
> > +       if (mgr->status & FPGA_MGR_STATUS_OPERATION_ERR)
> > +               len += sprintf(buf + len, "reconfig operation error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_CRC_ERR)
> > +               len += sprintf(buf + len, "reconfig crc error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_INCOMPATIBLE_BS_ERR)
> > +               len += sprintf(buf + len, "reconfig incompatible BS error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
> > +               len += sprintf(buf + len, "reconfig IP protocol error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
> > +               len += sprintf(buf + len, "reconfig fifo overflow error\n");
> > +       if (mgr->status & FPGA_MGR_STATUS_SECURE_LOAD_ERR)
> > +               len += sprintf(buf + len, "reconfig secure load error\n");
> > +
> > +       return len;
> > +}
> > +
> >  static DEVICE_ATTR_RO(name);
> >  static DEVICE_ATTR_RO(state);
> > +static DEVICE_ATTR_RO(status);
> >
> >  static struct attribute *fpga_mgr_attrs[] = {
> >         &dev_attr_name.attr,
> >         &dev_attr_state.attr,
> > +       &dev_attr_status.attr,
> >         NULL,
> >  };
> >  ATTRIBUTE_GROUPS(fpga_mgr);
> > diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
> > index b222a57..8cb42ac 100644
> > --- a/include/linux/fpga/fpga-mgr.h
> > +++ b/include/linux/fpga/fpga-mgr.h
> > @@ -128,6 +128,14 @@ struct fpga_manager_ops {
> >         void (*fpga_remove)(struct fpga_manager *mgr);
> >  };
> >
> > +/* FPGA manager status: Partial/Full Reconfiguration errors */
> > +#define FPGA_MGR_STATUS_OPERATION_ERR          BIT(0)
> > +#define FPGA_MGR_STATUS_CRC_ERR                        BIT(1)
> > +#define FPGA_MGR_STATUS_INCOMPATIBLE_BS_ERR    BIT(2)
> 
> How about ..._INCOMPATIBLE_IMAGE_ERR? :)

Hm.. It sounds better to me. : )
Will change it in next version patch set.

> 
> > +#define FPGA_MGR_STATUS_IP_PROTOCOL_ERR                BIT(3)
> > +#define FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR      BIT(4)
> > +#define FPGA_MGR_STATUS_SECURE_LOAD_ERR                BIT(5)
> > +
> >  /**
> >   * struct fpga_manager - fpga manager structure
> >   * @name: name of low level fpga manager
> > @@ -142,6 +150,7 @@ struct fpga_manager {
> >         struct device dev;
> >         struct mutex ref_mutex;
> >         enum fpga_mgr_states state;
> > +       u64 status;
> 
> With this implementation, the low level driver sets ops->status and
> that could be stale by the time the framework looks at it.  I suggest
> adding a function to fpga_manager_ops that returns the status.  That
> way whenever the status is requested, the low level driver will have
> the opportunity to read status registers.
> 
> Besides this, this new sysfs looks helpful.

I get your point, then I will add one member to fpga_manager_ops.

@@ -118,6 +118,7 @@ struct fpga_image_info {
 struct fpga_manager_ops {
        size_t initial_header_size;
        enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
+       u64 (*status)(struct fpga_manager *mgr);
        int (*write_init)(struct fpga_manager *mgr,
                          struct fpga_image_info *info,
                          const char *buf, size_t count);


and add common action to get status (pr error) in complete function.

@@ -139,6 +139,8 @@ static int fpga_mgr_write_complete(struct fpga_manager *mgr,
        if (ret) {
                dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
                mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
+               if (mgr->mops->status)
+                       mgr->status = mgr->mops->status(mgr);
                return ret;
        }
        mgr->state = FPGA_MGR_STATE_OPERATING;

after status is updated, then user could read it from the sysfs interface.

How do you think about this?

Thanks
Hao

  reply	other threads:[~2017-07-13  3:18 UTC|newest]

Thread overview: 150+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-26  1:51 [PATCH v2 00/22] Intel FPGA Device Drivers Wu Hao
2017-06-26  1:51 ` Wu Hao
2017-06-26  1:51 ` [PATCH v2 01/22] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-06-26  1:51   ` Wu Hao
2017-07-12 14:51   ` Alan Tull
2017-07-13  4:25     ` Wu Hao
2017-07-13  4:25       ` Wu Hao
2017-07-14 23:59       ` Luebbers, Enno
2017-07-17 20:14         ` Alan Tull
2017-07-18  5:22           ` Greg KH
2017-07-18  5:22             ` Greg KH
2017-07-18 14:32             ` Alan Tull
2017-07-18 14:32               ` Alan Tull
2017-06-26  1:51 ` [PATCH v2 02/22] fpga: add FPGA device framework Wu Hao
2017-06-26  1:51   ` Wu Hao
2017-07-27 16:35   ` Alan Tull
2017-07-27 19:10     ` Rob Herring
2017-07-27 19:10       ` Rob Herring
2017-07-31 21:40       ` Alan Tull
2017-07-31 21:40         ` Alan Tull
2017-08-01  8:43         ` Wu Hao
2017-08-01  8:43           ` Wu Hao
2017-08-01 21:04           ` Alan Tull
2017-08-02 14:07             ` Wu Hao
2017-08-02 21:01               ` Alan Tull
2017-08-02 21:01                 ` Alan Tull
2017-08-07 15:13       ` Alan Tull
2017-08-07 15:13         ` Alan Tull
2017-07-27 16:44   ` Alan Tull
2017-07-28  7:55     ` Wu Hao
2017-07-28  7:55       ` Wu Hao
2017-06-26  1:51 ` [PATCH v2 03/22] fpga: bridge: remove OF dependency for fpga-bridge Wu Hao
2017-06-26  1:51   ` Wu Hao
2017-08-02 21:21   ` Alan Tull
2017-09-25 16:34     ` Moritz Fischer
2017-09-21 19:11   ` Moritz Fischer
2017-09-21 19:11     ` Moritz Fischer
2017-09-21 19:50     ` Alan Tull
2017-09-22  2:15       ` Wu Hao
2017-09-22  2:15         ` Wu Hao
2017-09-23  1:53         ` Alan Tull
2017-09-23  1:53           ` Alan Tull
2017-06-26  1:52 ` [PATCH v2 04/22] fpga: mgr: add region_id to fpga_image_info Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-07-26 18:33   ` Alan Tull
2017-07-26 18:33     ` Alan Tull
2017-07-27  5:14     ` Wu Hao
2017-07-27  5:14       ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 05/22] fpga: mgr: add status for fpga-mgr Wu Hao
2017-07-12 15:22   ` Alan Tull
2017-07-12 15:22     ` Alan Tull
2017-07-13  3:11     ` Wu Hao [this message]
2017-07-13  3:11       ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 06/22] fpga: intel: add FPGA PCIe device driver Wu Hao
2017-08-07 20:43   ` Alan Tull
2017-08-14 12:33     ` Wu, Hao
2017-08-14 12:33       ` Wu, Hao
2017-08-14 12:33       ` Wu, Hao
2017-06-26  1:52 ` [PATCH v2 07/22] fpga: intel: pcie: parse feature list and create platform device for features Wu Hao
2017-06-26 18:42   ` Moritz Fischer
2017-06-27  3:17     ` Wu Hao
2017-06-27 15:34     ` Alan Tull
2017-06-27 15:34       ` Alan Tull
2017-07-13 17:52   ` Alan Tull
2017-07-13 17:52     ` Alan Tull
2017-07-14  9:22     ` Wu Hao
2017-07-14  9:22       ` Wu Hao
2017-07-17 19:15   ` Alan Tull
2017-07-18  2:29     ` Wu, Hao
2017-09-20 21:24   ` Alan Tull
2017-09-21 19:58     ` Alan Tull
2017-09-22  7:33       ` Wu Hao
2017-09-22  7:33         ` Wu Hao
2017-09-22  7:28     ` Wu Hao
2017-09-27 20:27       ` Alan Tull
2017-09-27 20:27         ` Alan Tull
2017-09-28  9:32         ` Wu Hao
2017-09-28  9:32           ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 08/22] fpga: intel: pcie: add chardev support for feature devices Wu Hao
2017-06-26  1:52 ` [PATCH v2 09/22] fpga: intel: pcie: adds fpga_for_each_port callback for fme device Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-08-17 21:31   ` Alan Tull
2017-08-18  7:03     ` Wu Hao
2017-08-18  7:03       ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 10/22] fpga: intel: add feature device infrastructure Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 11/22] fpga: intel: add FPGA Management Engine driver basic framework Wu Hao
2017-06-26  1:52 ` [PATCH v2 12/22] fpga: intel: fme: add header sub feature support Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-07-17 18:53   ` Alan Tull
2017-07-18  1:17     ` Wu, Hao
2017-07-18  1:17       ` Wu, Hao
2017-07-18 14:33       ` Alan Tull
2017-07-18 14:33         ` Alan Tull
2017-06-26  1:52 ` [PATCH v2 13/22] fpga: intel: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-08-17 19:11   ` Alan Tull
2017-06-26  1:52 ` [PATCH v2 14/22] fpga: intel: fme: add partial reconfiguration sub feature support Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 15/22] fpga: intel: add fpga manager platform driver for FME Wu Hao
2017-09-25 21:24   ` Moritz Fischer
2017-09-27  1:18     ` Wu Hao
2017-09-27  1:18       ` Wu Hao
2017-09-27 18:54       ` Alan Tull
2017-09-28  8:25         ` Wu Hao
2017-09-28  8:25           ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 16/22] fpga: intel: add fpga bridge " Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-08-17 19:34   ` Alan Tull
2017-08-17 19:34     ` Alan Tull
2017-08-17 19:55   ` Moritz Fischer
2017-08-18  3:06     ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 17/22] fpga: intel: add fpga region " Wu Hao
2017-07-12 16:09   ` Alan Tull
2017-07-12 16:09     ` Alan Tull
2017-07-13  2:31     ` Wu Hao
2017-07-13  2:31       ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 18/22] fpga: intel: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-08-17 19:00   ` Alan Tull
2017-08-17 19:00     ` Alan Tull
2017-08-18  6:40     ` Wu Hao
2017-08-18  6:40       ` Wu Hao
2017-08-17 19:09   ` Moritz Fischer
2017-08-18  6:42     ` Wu Hao
2017-08-18  6:42       ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 19/22] fpga: intel: afu: add header sub feature support Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-08-14 21:37   ` Alan Tull
2017-08-16  5:11     ` Wu, Hao
2017-08-16  5:11       ` Wu, Hao
2017-08-16  5:11       ` Wu, Hao
2017-08-17 21:41       ` Alan Tull
2017-06-26  1:52 ` [PATCH v2 20/22] fpga: intel: afu add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-08-17 19:07   ` Alan Tull
2017-08-17 19:12   ` Moritz Fischer
2017-08-18  3:20     ` Wu Hao
2017-08-18  3:20       ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 21/22] fpga: intel: afu: add user afu sub feature support Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-06-26  1:52 ` [PATCH v2 22/22] fpga: intel: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-06-26  1:52   ` Wu Hao
2017-07-31 21:41   ` Alan Tull
2017-08-01  7:21     ` Wu Hao
2017-08-01  7:21       ` Wu Hao
2017-08-01 18:15   ` Moritz Fischer
2017-08-02  7:30     ` Wu Hao
2017-08-02  7:30       ` Wu Hao
2017-07-28 13:28 ` [PATCH v2 00/22] Intel FPGA Device Drivers Alan Tull
2017-07-28 13:28   ` Alan Tull

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