From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: Aristeu Rozanski <aris@redhat.com>,
"rjw@rjwysocki.net" <rjw@rjwysocki.net>,
"srinivas.pandruvada@linux.intel.com"
<srinivas.pandruvada@linux.intel.com>,
"lenb@kernel.org" <lenb@kernel.org>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Subject: Re: [PATCH 3/3] ghes_edac: add platform check to enable ghes_edac
Date: Thu, 20 Jul 2017 21:00:20 -0300 [thread overview]
Message-ID: <20170720210020.0996b7e2@vento.lan> (raw)
In-Reply-To: <20170720211553.itdbvjacjnliago5@intel.com>
Em Thu, 20 Jul 2017 14:15:54 -0700
"Luck, Tony" <tony.luck@intel.com> escreveu:
> On Wed, Jul 19, 2017 at 01:02:45PM -0300, Mauro Carvalho Chehab wrote:
> > Tony/Aris,
> >
> > I got yesterday an HP ML350 G9, equipped with Sandy Bridge EP CPUs (E5-2640v4).
> > I'm running Kernel 4.11 there.
> >
> > AFAIKT, Sandy Bridge EP has 4 channels per memory controller, right?
> > That would match the number of memory slots on this machine (24 slots).
> >
> > Yet, EDAC is only identifying 3 channels per CPU:
> >
> > $ ras-mc-ctl --layout
> > +-----------------------------------------------------------------------+
> > | mc0 | mc1 |
> > | channel0 | channel1 | channel2 | channel0 | channel1 | channel2 |
> > -------+-----------------------------------------------------------------------+
> > slot2: | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB |
> > slot1: | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB |
> > slot0: | 16384 MB | 0 MB | 16384 MB | 16384 MB | 0 MB | 16384 MB |
> > -------+---------------------------------------------------------------------------+
> >
> > So, it seems that either the BIOS is hidden the other channel or
> > there's something wrong with SandyBridge EP support at sb_edac driver.
>
> Does lspci show all four of these devices?
>
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa /* 15.2 */
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab /* 15.3 */
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac /* 15.4 */
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad /* 15.5 */
>
> There should be two of each (one on bus 7f, the other on bus ff).
It is getting all 4 TAD devices (Broadwell). This is what I'm getting
(from the PCI IDs that it is supposed to be on Broadwell):
00:05.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Map/VTd_Misc/System Management [8086:6f28] (rev 01)
7f:0f.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffc] (rev 01)
7f:0f.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffd] (rev 01)
7f:12.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Home Agent 0 [8086:6fa0] (rev 01)
7f:13.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6fa8] (rev 01)
7f:13.1 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6f71] (rev 01)
7f:13.2 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6faa] (rev 01)
7f:13.3 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fab] (rev 01)
7f:13.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fac] (rev 01)
7f:13.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fad] (rev 01)
7f:13.7 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DDRIO Global Broadcast [8086:6faf] (rev 01)
7f:16.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Target Address/Thermal/RAS [8086:6f68] (rev 01)
80:05.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Map/VTd_Misc/System Management [8086:6f28] (rev 01)
ff:0f.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffc] (rev 01)
ff:0f.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffd] (rev 01)
ff:12.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Home Agent 0 [8086:6fa0] (rev 01)
ff:13.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6fa8] (rev 01)
ff:13.1 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6f71] (rev 01)
ff:13.2 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6faa] (rev 01)
ff:13.3 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fab] (rev 01)
ff:13.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fac] (rev 01)
ff:13.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fad] (rev 01)
ff:13.7 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DDRIO Global Broadcast [8086:6faf] (rev 01)
ff:16.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Target Address/Thermal/RAS [8086:6f68] (rev 01)
Thanks,
Mauro
WARNING: multiple messages have this Message-ID (diff)
From: Mauro Carvalho Chehab <mchehab@s-opensource.com>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: Aristeu Rozanski <aris@redhat.com>,
"rjw@rjwysocki.net" <rjw@rjwysocki.net>,
"srinivas.pandruvada@linux.intel.com"
<srinivas.pandruvada@linux.intel.com>,
"lenb@kernel.org" <lenb@kernel.org>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Subject: [3/3] ghes_edac: add platform check to enable ghes_edac
Date: Thu, 20 Jul 2017 21:00:20 -0300 [thread overview]
Message-ID: <20170720210020.0996b7e2@vento.lan> (raw)
Em Thu, 20 Jul 2017 14:15:54 -0700
"Luck, Tony" <tony.luck@intel.com> escreveu:
> On Wed, Jul 19, 2017 at 01:02:45PM -0300, Mauro Carvalho Chehab wrote:
> > Tony/Aris,
> >
> > I got yesterday an HP ML350 G9, equipped with Sandy Bridge EP CPUs (E5-2640v4).
> > I'm running Kernel 4.11 there.
> >
> > AFAIKT, Sandy Bridge EP has 4 channels per memory controller, right?
> > That would match the number of memory slots on this machine (24 slots).
> >
> > Yet, EDAC is only identifying 3 channels per CPU:
> >
> > $ ras-mc-ctl --layout
> > +-----------------------------------------------------------------------+
> > | mc0 | mc1 |
> > | channel0 | channel1 | channel2 | channel0 | channel1 | channel2 |
> > -------+-----------------------------------------------------------------------+
> > slot2: | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB |
> > slot1: | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB | 0 MB |
> > slot0: | 16384 MB | 0 MB | 16384 MB | 16384 MB | 0 MB | 16384 MB |
> > -------+---------------------------------------------------------------------------+
> >
> > So, it seems that either the BIOS is hidden the other channel or
> > there's something wrong with SandyBridge EP support at sb_edac driver.
>
> Does lspci show all four of these devices?
>
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD0 0x3caa /* 15.2 */
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD1 0x3cab /* 15.3 */
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD2 0x3cac /* 15.4 */
> include/linux/pci_ids.h:#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_TAD3 0x3cad /* 15.5 */
>
> There should be two of each (one on bus 7f, the other on bus ff).
It is getting all 4 TAD devices (Broadwell). This is what I'm getting
(from the PCI IDs that it is supposed to be on Broadwell):
00:05.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Map/VTd_Misc/System Management [8086:6f28] (rev 01)
7f:0f.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffc] (rev 01)
7f:0f.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffd] (rev 01)
7f:12.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Home Agent 0 [8086:6fa0] (rev 01)
7f:13.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6fa8] (rev 01)
7f:13.1 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6f71] (rev 01)
7f:13.2 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6faa] (rev 01)
7f:13.3 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fab] (rev 01)
7f:13.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fac] (rev 01)
7f:13.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fad] (rev 01)
7f:13.7 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DDRIO Global Broadcast [8086:6faf] (rev 01)
7f:16.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Target Address/Thermal/RAS [8086:6f68] (rev 01)
80:05.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Map/VTd_Misc/System Management [8086:6f28] (rev 01)
ff:0f.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffc] (rev 01)
ff:0f.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Caching Agent [8086:6ffd] (rev 01)
ff:12.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Home Agent 0 [8086:6fa0] (rev 01)
ff:13.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6fa8] (rev 01)
ff:13.1 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Target Address/Thermal/RAS [8086:6f71] (rev 01)
ff:13.2 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6faa] (rev 01)
ff:13.3 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fab] (rev 01)
ff:13.4 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fac] (rev 01)
ff:13.5 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Memory Controller 0 - Channel Target Address Decoder [8086:6fad] (rev 01)
ff:13.7 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DDRIO Global Broadcast [8086:6faf] (rev 01)
ff:16.0 System peripheral [0880]: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Target Address/Thermal/RAS [8086:6f68] (rev 01)
Thanks,
Mauro
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next prev parent reply other threads:[~2017-07-21 0:00 UTC|newest]
Thread overview: 238+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-17 21:59 [PATCH 0/3] enable ghes_edac on selected platforms Toshi Kani
2017-07-17 21:59 ` [PATCH 1/3] ACPI / blacklist: add acpi_match_oemlist() interface Toshi Kani
2017-07-17 21:59 ` [1/3] " Toshi Kani
2017-07-18 5:34 ` [PATCH 1/3] " Borislav Petkov
2017-07-18 5:34 ` [1/3] " Borislav Petkov
2017-07-18 15:48 ` [PATCH 1/3] " Kani, Toshimitsu
2017-07-18 15:48 ` [1/3] " Toshi Kani
2017-07-18 15:48 ` [PATCH 1/3] " Kani, Toshimitsu
2017-07-18 16:43 ` Borislav Petkov
2017-07-18 16:43 ` [1/3] " Borislav Petkov
2017-07-18 16:43 ` [PATCH 1/3] " Borislav Petkov
2017-07-18 17:24 ` Kani, Toshimitsu
2017-07-18 17:24 ` [1/3] " Toshi Kani
2017-07-18 17:24 ` [PATCH 1/3] " Kani, Toshimitsu
2017-07-18 17:42 ` Borislav Petkov
2017-07-18 17:42 ` [1/3] " Borislav Petkov
2017-07-18 17:42 ` [PATCH 1/3] " Borislav Petkov
2017-07-18 18:49 ` Kani, Toshimitsu
2017-07-18 18:49 ` [1/3] " Toshi Kani
2017-07-18 18:49 ` [PATCH 1/3] " Kani, Toshimitsu
2017-07-18 19:32 ` Borislav Petkov
2017-07-18 19:32 ` [1/3] " Borislav Petkov
2017-07-18 19:32 ` [PATCH 1/3] " Borislav Petkov
2017-07-18 20:17 ` Kani, Toshimitsu
2017-07-18 20:17 ` [1/3] " Toshi Kani
2017-07-18 20:17 ` [PATCH 1/3] " Kani, Toshimitsu
2017-07-17 21:59 ` [PATCH 2/3] intel_pstate: convert to use acpi_match_oemlist() Toshi Kani
2017-07-17 21:59 ` [2/3] " Toshi Kani
2017-07-17 21:59 ` [PATCH 3/3] ghes_edac: add platform check to enable ghes_edac Toshi Kani
2017-07-17 21:59 ` [3/3] " Toshi Kani
2017-07-18 6:00 ` [PATCH 3/3] " Borislav Petkov
2017-07-18 6:00 ` [3/3] " Borislav Petkov
2017-07-18 8:08 ` [PATCH 3/3] " Borislav Petkov
2017-07-18 8:08 ` [3/3] " Borislav Petkov
2017-07-18 21:20 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-18 21:20 ` [3/3] " Toshi Kani
2017-07-18 21:20 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-19 5:52 ` Borislav Petkov
2017-07-19 5:52 ` [3/3] " Borislav Petkov
2017-07-19 5:52 ` [PATCH 3/3] " Borislav Petkov
2017-07-19 16:10 ` Kani, Toshimitsu
2017-07-19 16:10 ` [3/3] " Toshi Kani
2017-07-19 16:10 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-19 16:22 ` Borislav Petkov
2017-07-19 16:22 ` [3/3] " Borislav Petkov
2017-07-19 16:22 ` [PATCH 3/3] " Borislav Petkov
2017-07-19 16:56 ` Kani, Toshimitsu
2017-07-19 16:56 ` [3/3] " Toshi Kani
2017-07-19 16:56 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-20 4:16 ` Borislav Petkov
2017-07-20 4:16 ` [3/3] " Borislav Petkov
2017-07-20 4:16 ` [PATCH 3/3] " Borislav Petkov
2017-07-20 14:42 ` Kani, Toshimitsu
2017-07-20 14:42 ` [3/3] " Toshi Kani
2017-07-20 14:42 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-20 15:04 ` Borislav Petkov
2017-07-20 15:04 ` [3/3] " Borislav Petkov
2017-07-20 15:04 ` [PATCH 3/3] " Borislav Petkov
2017-07-20 16:55 ` Luck, Tony
2017-07-20 16:55 ` [3/3] " Luck, Tony
2017-07-20 16:55 ` [PATCH 3/3] " Luck, Tony
2017-07-20 17:05 ` Borislav Petkov
2017-07-20 17:05 ` [3/3] " Borislav Petkov
2017-07-20 17:05 ` [PATCH 3/3] " Borislav Petkov
2017-07-20 17:10 ` Luck, Tony
2017-07-20 17:10 ` [3/3] " Luck, Tony
2017-07-20 17:10 ` [PATCH 3/3] " Luck, Tony
2017-07-20 18:16 ` Mauro Carvalho Chehab
2017-07-20 18:16 ` [3/3] " Mauro Carvalho Chehab
2017-07-20 18:16 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-19 18:55 ` Aristeu Rozanski
2017-07-19 18:55 ` [3/3] " Aristeu Rozanski
2017-07-19 18:55 ` [PATCH 3/3] " Aristeu Rozanski
2017-07-19 20:13 ` Kani, Toshimitsu
2017-07-19 20:13 ` [3/3] " Toshi Kani
2017-07-19 20:13 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-20 4:19 ` Borislav Petkov
2017-07-20 4:19 ` [3/3] " Borislav Petkov
2017-07-20 4:19 ` [PATCH 3/3] " Borislav Petkov
2017-07-18 19:58 ` Kani, Toshimitsu
2017-07-18 19:58 ` [3/3] " Toshi Kani
2017-07-18 19:58 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-18 21:15 ` Mauro Carvalho Chehab
2017-07-18 21:15 ` [3/3] " Mauro Carvalho Chehab
2017-07-18 21:15 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-19 5:58 ` Borislav Petkov
2017-07-19 5:58 ` [3/3] " Borislav Petkov
2017-07-19 5:58 ` [PATCH 3/3] " Borislav Petkov
2017-07-19 15:14 ` Luck, Tony
2017-07-19 15:14 ` [3/3] " Luck, Tony
2017-07-19 15:14 ` [PATCH 3/3] " Luck, Tony
2017-07-19 15:57 ` Borislav Petkov
2017-07-19 15:57 ` [3/3] " Borislav Petkov
2017-07-19 15:57 ` [PATCH 3/3] " Borislav Petkov
2017-07-19 18:06 ` Luck, Tony
2017-07-19 18:06 ` [3/3] " Luck, Tony
2017-07-19 18:06 ` [PATCH 3/3] " Luck, Tony
2017-07-19 16:02 ` Mauro Carvalho Chehab
2017-07-19 16:02 ` [3/3] " Mauro Carvalho Chehab
2017-07-19 20:06 ` [PATCH 3/3] " Luck, Tony
2017-07-19 20:06 ` [3/3] " Luck, Tony
2017-07-20 21:15 ` [PATCH 3/3] " Luck, Tony
2017-07-20 21:15 ` [3/3] " Luck, Tony
2017-07-21 0:00 ` Mauro Carvalho Chehab [this message]
2017-07-21 0:00 ` Mauro Carvalho Chehab
2017-07-21 16:53 ` [PATCH 3/3] " Luck, Tony
2017-07-21 16:53 ` [3/3] " Luck, Tony
2017-07-19 16:40 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-19 16:40 ` [3/3] " Toshi Kani
2017-07-19 16:40 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-20 4:33 ` Borislav Petkov
2017-07-20 4:33 ` [3/3] " Borislav Petkov
2017-07-20 4:33 ` [PATCH 3/3] " Borislav Petkov
2017-07-20 19:50 ` Kani, Toshimitsu
2017-07-20 19:50 ` [3/3] " Toshi Kani
2017-07-20 19:50 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-20 20:15 ` Mauro Carvalho Chehab
2017-07-20 20:15 ` [3/3] " Mauro Carvalho Chehab
2017-07-20 20:15 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-20 21:07 ` Kani, Toshimitsu
2017-07-20 21:07 ` [3/3] " Toshi Kani
2017-07-20 21:07 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-21 13:34 ` Borislav Petkov
2017-07-21 13:34 ` [3/3] " Borislav Petkov
2017-07-21 13:34 ` [PATCH 3/3] " Borislav Petkov
2017-07-21 13:40 ` Mauro Carvalho Chehab
2017-07-21 13:40 ` [3/3] " Mauro Carvalho Chehab
2017-07-21 13:40 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-21 13:47 ` Borislav Petkov
2017-07-21 13:47 ` [3/3] " Borislav Petkov
2017-07-21 13:47 ` [PATCH 3/3] " Borislav Petkov
2017-07-21 15:08 ` Kani, Toshimitsu
2017-07-21 15:08 ` [3/3] " Toshi Kani
2017-07-21 15:08 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-21 15:13 ` Borislav Petkov
2017-07-21 15:13 ` [3/3] " Borislav Petkov
2017-07-21 15:13 ` [PATCH 3/3] " Borislav Petkov
2017-07-21 15:34 ` Kani, Toshimitsu
2017-07-21 15:34 ` [3/3] " Toshi Kani
2017-07-21 15:34 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-21 15:44 ` Mauro Carvalho Chehab
2017-07-21 15:44 ` [3/3] " Mauro Carvalho Chehab
2017-07-21 15:44 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-21 16:40 ` Kani, Toshimitsu
2017-07-21 16:40 ` [3/3] " Toshi Kani
2017-07-21 16:40 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-21 17:01 ` Mauro Carvalho Chehab
2017-07-21 17:01 ` [3/3] " Mauro Carvalho Chehab
2017-07-21 17:01 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-21 17:21 ` Kani, Toshimitsu
2017-07-21 17:21 ` [3/3] " Toshi Kani
2017-07-21 17:21 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-21 17:23 ` Borislav Petkov
2017-07-21 17:23 ` [3/3] " Borislav Petkov
2017-07-21 17:23 ` [PATCH 3/3] " Borislav Petkov
2017-07-21 18:38 ` Kani, Toshimitsu
2017-07-21 18:38 ` [3/3] " Toshi Kani
2017-07-21 18:38 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-22 6:28 ` Borislav Petkov
2017-07-22 6:28 ` [3/3] " Borislav Petkov
2017-07-22 6:28 ` [PATCH 3/3] " Borislav Petkov
2017-07-24 14:49 ` Kani, Toshimitsu
2017-07-24 14:49 ` [3/3] " Toshi Kani
2017-07-24 14:49 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-24 15:04 ` Borislav Petkov
2017-07-24 15:04 ` [3/3] " Borislav Petkov
2017-07-24 15:04 ` [PATCH 3/3] " Borislav Petkov
2017-07-24 15:25 ` Kani, Toshimitsu
2017-07-24 15:25 ` [3/3] " Toshi Kani
2017-07-24 15:25 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-24 15:37 ` Borislav Petkov
2017-07-24 15:37 ` [3/3] " Borislav Petkov
2017-07-24 15:37 ` [PATCH 3/3] " Borislav Petkov
2017-07-24 15:56 ` Kani, Toshimitsu
2017-07-24 15:56 ` [3/3] " Toshi Kani
2017-07-24 15:56 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-24 16:37 ` Borislav Petkov
2017-07-24 16:37 ` [3/3] " Borislav Petkov
2017-07-24 16:37 ` [PATCH 3/3] " Borislav Petkov
2017-07-24 17:44 ` Kani, Toshimitsu
2017-07-24 17:44 ` [3/3] " Toshi Kani
2017-07-24 17:44 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-24 17:50 ` Boris Petkov
2017-07-24 17:50 ` [3/3] " Borislav Petkov
2017-07-24 17:50 ` [PATCH 3/3] " Boris Petkov
2017-07-24 17:54 ` Kani, Toshimitsu
2017-07-24 17:54 ` [3/3] " Toshi Kani
2017-07-24 17:54 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-24 18:18 ` Borislav Petkov
2017-07-24 18:18 ` [3/3] " Borislav Petkov
2017-07-24 18:18 ` [PATCH 3/3] " Borislav Petkov
2017-07-24 17:56 ` Mauro Carvalho Chehab
2017-07-24 17:56 ` [3/3] " Mauro Carvalho Chehab
2017-07-24 17:56 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-24 18:12 ` Kani, Toshimitsu
2017-07-24 18:12 ` [3/3] " Toshi Kani
2017-07-24 18:12 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-24 16:04 ` Mauro Carvalho Chehab
2017-07-24 16:04 ` [3/3] " Mauro Carvalho Chehab
2017-07-24 16:04 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-24 16:44 ` Borislav Petkov
2017-07-24 16:44 ` [3/3] " Borislav Petkov
2017-07-24 16:44 ` [PATCH 3/3] " Borislav Petkov
2017-07-24 18:10 ` Mauro Carvalho Chehab
2017-07-24 18:10 ` [3/3] " Mauro Carvalho Chehab
2017-07-24 18:10 ` [PATCH 3/3] " Mauro Carvalho Chehab
2017-07-24 18:30 ` Borislav Petkov
2017-07-24 18:30 ` [3/3] " Borislav Petkov
2017-07-24 18:30 ` [PATCH 3/3] " Borislav Petkov
2017-07-25 23:00 ` Kani, Toshimitsu
2017-07-25 23:00 ` [3/3] " Toshi Kani
2017-07-25 23:00 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-21 15:53 ` Borislav Petkov
2017-07-21 15:53 ` [3/3] " Borislav Petkov
2017-07-21 15:53 ` [PATCH 3/3] " Borislav Petkov
2017-07-21 16:32 ` Kani, Toshimitsu
2017-07-21 16:32 ` [3/3] " Toshi Kani
2017-07-21 16:32 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-19 5:55 ` Borislav Petkov
2017-07-19 5:55 ` [3/3] " Borislav Petkov
2017-07-19 5:55 ` [PATCH 3/3] " Borislav Petkov
2017-07-18 22:13 ` Luck, Tony
2017-07-18 22:13 ` [3/3] " Luck, Tony
2017-07-18 22:13 ` [PATCH 3/3] " Luck, Tony
2017-07-19 6:01 ` Borislav Petkov
2017-07-19 6:01 ` [3/3] " Borislav Petkov
2017-07-19 6:01 ` [PATCH 3/3] " Borislav Petkov
2017-07-18 14:39 ` Jeffrey Hugo
2017-07-18 14:39 ` [3/3] " Jeffrey Hugo
2017-07-18 15:36 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-18 15:36 ` [3/3] " Toshi Kani
2017-07-18 15:36 ` [PATCH 3/3] " Kani, Toshimitsu
2017-07-18 16:24 ` Jeffrey Hugo
2017-07-18 16:24 ` [3/3] " Jeffrey Hugo
2017-07-18 16:24 ` [PATCH 3/3] " Jeffrey Hugo
2017-07-18 16:42 ` Kani, Toshimitsu
2017-07-18 16:42 ` [3/3] " Toshi Kani
2017-07-18 16:42 ` [PATCH 3/3] " Kani, Toshimitsu
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