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From: codekipper@gmail.com
To: maxime.ripard@free-electrons.com
Cc: linux-arm-kernel@lists.infradead.org,
	linux-sunxi@googlegroups.com, lgirdwood@gmail.com,
	broonie@kernel.org, linux-kernel@vger.kernel.org,
	alsa-devel@alsa-project.org, be17068@iperbole.bo.it,
	Marcus Cooper <codekipper@gmail.com>
Subject: [PATCH v3 05/12] ASoC: sun4i-i2s: Add regmap fields for channels
Date: Sat, 29 Jul 2017 16:17:46 +0200	[thread overview]
Message-ID: <20170729141753.20174-6-codekipper@gmail.com> (raw)
In-Reply-To: <20170729141753.20174-1-codekipper@gmail.com>

From: Marcus Cooper <codekipper@gmail.com>

On the original i2s block the channel mapping and selection were
configured for stereo audio by default: This is not the case with
the newer SoCs and they are also located at different offsets.

To support the newer SoC then regmap fields have been added to the
quirks and these are initialised to their correct settings during
probing.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
---
 sound/soc/sunxi/sun4i-i2s.c | 80 ++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 72 insertions(+), 8 deletions(-)

diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index 2a25df22c2f8..120f797a38e8 100644
--- a/sound/soc/sunxi/sun4i-i2s.c
+++ b/sound/soc/sunxi/sun4i-i2s.c
@@ -82,7 +82,7 @@
 #define SUN4I_I2S_TX_CNT_REG		0x2c
 
 #define SUN4I_I2S_TX_CHAN_SEL_REG	0x30
-#define SUN4I_I2S_TX_CHAN_SEL(num_chan)		(((num_chan) - 1) << 0)
+#define SUN4I_I2S_CHAN_SEL(num_chan)		(((num_chan) - 1) << 0)
 
 #define SUN4I_I2S_TX_CHAN_MAP_REG	0x34
 #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)	((sample) << (chan << 2))
@@ -98,6 +98,10 @@
  * @sun4i_i2s_regmap: regmap config to use.
  * @mclk_offset: Value by which mclkdiv needs to be adjusted.
  * @bclk_offset: Value by which bclkdiv needs to be adjusted.
+ * @field_txchanmap: location of the tx channel mapping register.
+ * @field_rxchanmap: location of the rx channel mapping register.
+ * @field_txchansel: location of the tx channel select bit fields.
+ * @field_rxchansel: location of the rx channel select bit fields.
  */
 struct sun4i_i2s_quirks {
 	bool				has_reset;
@@ -105,6 +109,12 @@ struct sun4i_i2s_quirks {
 	const struct regmap_config	*sun4i_i2s_regmap;
 	unsigned int			mclk_offset;
 	unsigned int			bclk_offset;
+
+	/* Register fields for i2s */
+	struct reg_field		field_txchanmap;
+	struct reg_field		field_rxchanmap;
+	struct reg_field		field_txchansel;
+	struct reg_field		field_rxchansel;
 };
 
 struct sun4i_i2s {
@@ -118,6 +128,12 @@ struct sun4i_i2s {
 	struct snd_dmaengine_dai_dma_data	capture_dma_data;
 	struct snd_dmaengine_dai_dma_data	playback_dma_data;
 
+	/* Register fields for i2s */
+	struct regmap_field	*field_txchanmap;
+	struct regmap_field	*field_rxchanmap;
+	struct regmap_field	*field_txchansel;
+	struct regmap_field	*field_rxchansel;
+
 	const struct sun4i_i2s_quirks	*variant;
 };
 
@@ -264,6 +280,18 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
 	if (params_channels(params) != 2)
 		return -EINVAL;
 
+	/* Map the channels for playback and capture */
+	regmap_field_write(i2s->field_txchanmap, 0x76543210);
+	regmap_field_write(i2s->field_rxchanmap, 0x00003210);
+
+	/* Configure the channels */
+	regmap_field_write(i2s->field_txchansel,
+			   SUN4I_I2S_CHAN_SEL(params_channels(params)));
+
+	regmap_field_write(i2s->field_rxchansel,
+			   SUN4I_I2S_CHAN_SEL(params_channels(params)));
+
+
 	switch (params_physical_width(params)) {
 	case 16:
 		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
@@ -486,13 +514,6 @@ static int sun4i_i2s_startup(struct snd_pcm_substream *substream,
 			   SUN4I_I2S_CTRL_SDO_EN_MASK,
 			   SUN4I_I2S_CTRL_SDO_EN(0));
 
-	/* Enable the first two channels */
-	regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_SEL_REG,
-		     SUN4I_I2S_TX_CHAN_SEL(2));
-
-	/* Map them to the two first samples coming in */
-	regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_MAP_REG,
-		     SUN4I_I2S_TX_CHAN_MAP(0, 0) | SUN4I_I2S_TX_CHAN_MAP(1, 1));
 
 	return clk_prepare_enable(i2s->mod_clk);
 }
@@ -677,14 +698,51 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = {
 	.has_reset		= false,
 	.reg_offset_txdata	= SUN4I_I2S_FIFO_TX_REG,
 	.sun4i_i2s_regmap	= &sun4i_i2s_regmap_config,
+	.field_txchanmap	= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
+	.field_rxchanmap	= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
+	.field_txchansel	= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
+	.field_rxchansel	= REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
 };
 
 static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
 	.has_reset		= true,
 	.reg_offset_txdata	= SUN4I_I2S_FIFO_TX_REG,
 	.sun4i_i2s_regmap	= &sun4i_i2s_regmap_config,
+	.field_txchanmap	= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
+	.field_rxchanmap	= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
+	.field_txchansel	= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
+	.field_rxchansel	= REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
 };
 
+static int sun4i_i2s_init_regmap_fields(struct device *dev, struct sun4i_i2s *i2s)
+{
+	i2s->field_txchanmap =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_txchanmap);
+	if (IS_ERR(i2s->field_txchanmap))
+		return PTR_ERR(i2s->field_txchanmap);
+
+	i2s->field_rxchanmap =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_rxchanmap);
+	if (IS_ERR(i2s->field_rxchanmap))
+		return PTR_ERR(i2s->field_rxchanmap);
+
+	i2s->field_txchansel =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_txchansel);
+	if (IS_ERR(i2s->field_txchansel))
+		return PTR_ERR(i2s->field_txchansel);
+
+	i2s->field_rxchansel =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_rxchansel);
+	if (IS_ERR(i2s->field_rxchansel))
+		return PTR_ERR(i2s->field_rxchansel);
+
+	return 0;
+}
+
 static int sun4i_i2s_probe(struct platform_device *pdev)
 {
 	struct sun4i_i2s *i2s;
@@ -778,6 +836,12 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
 		goto err_suspend;
 	}
 
+	ret = sun4i_i2s_init_regmap_fields(&pdev->dev, i2s);
+	if (ret) {
+		dev_err(&pdev->dev, "Could not initialise regmap fields\n");
+		goto err_suspend;
+	}
+
 	return 0;
 
 err_suspend:
-- 
2.13.3

WARNING: multiple messages have this Message-ID (diff)
From: codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw@public.gmane.org,
	be17068-p0aYb1w59bq9tCD/VL7h6Q@public.gmane.org,
	Marcus Cooper
	<codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: [PATCH v3 05/12] ASoC: sun4i-i2s: Add regmap fields for channels
Date: Sat, 29 Jul 2017 16:17:46 +0200	[thread overview]
Message-ID: <20170729141753.20174-6-codekipper@gmail.com> (raw)
In-Reply-To: <20170729141753.20174-1-codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

On the original i2s block the channel mapping and selection were
configured for stereo audio by default: This is not the case with
the newer SoCs and they are also located at different offsets.

To support the newer SoC then regmap fields have been added to the
quirks and these are initialised to their correct settings during
probing.

Signed-off-by: Marcus Cooper <codekipper-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 sound/soc/sunxi/sun4i-i2s.c | 80 ++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 72 insertions(+), 8 deletions(-)

diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index 2a25df22c2f8..120f797a38e8 100644
--- a/sound/soc/sunxi/sun4i-i2s.c
+++ b/sound/soc/sunxi/sun4i-i2s.c
@@ -82,7 +82,7 @@
 #define SUN4I_I2S_TX_CNT_REG		0x2c
 
 #define SUN4I_I2S_TX_CHAN_SEL_REG	0x30
-#define SUN4I_I2S_TX_CHAN_SEL(num_chan)		(((num_chan) - 1) << 0)
+#define SUN4I_I2S_CHAN_SEL(num_chan)		(((num_chan) - 1) << 0)
 
 #define SUN4I_I2S_TX_CHAN_MAP_REG	0x34
 #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)	((sample) << (chan << 2))
@@ -98,6 +98,10 @@
  * @sun4i_i2s_regmap: regmap config to use.
  * @mclk_offset: Value by which mclkdiv needs to be adjusted.
  * @bclk_offset: Value by which bclkdiv needs to be adjusted.
+ * @field_txchanmap: location of the tx channel mapping register.
+ * @field_rxchanmap: location of the rx channel mapping register.
+ * @field_txchansel: location of the tx channel select bit fields.
+ * @field_rxchansel: location of the rx channel select bit fields.
  */
 struct sun4i_i2s_quirks {
 	bool				has_reset;
@@ -105,6 +109,12 @@ struct sun4i_i2s_quirks {
 	const struct regmap_config	*sun4i_i2s_regmap;
 	unsigned int			mclk_offset;
 	unsigned int			bclk_offset;
+
+	/* Register fields for i2s */
+	struct reg_field		field_txchanmap;
+	struct reg_field		field_rxchanmap;
+	struct reg_field		field_txchansel;
+	struct reg_field		field_rxchansel;
 };
 
 struct sun4i_i2s {
@@ -118,6 +128,12 @@ struct sun4i_i2s {
 	struct snd_dmaengine_dai_dma_data	capture_dma_data;
 	struct snd_dmaengine_dai_dma_data	playback_dma_data;
 
+	/* Register fields for i2s */
+	struct regmap_field	*field_txchanmap;
+	struct regmap_field	*field_rxchanmap;
+	struct regmap_field	*field_txchansel;
+	struct regmap_field	*field_rxchansel;
+
 	const struct sun4i_i2s_quirks	*variant;
 };
 
@@ -264,6 +280,18 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
 	if (params_channels(params) != 2)
 		return -EINVAL;
 
+	/* Map the channels for playback and capture */
+	regmap_field_write(i2s->field_txchanmap, 0x76543210);
+	regmap_field_write(i2s->field_rxchanmap, 0x00003210);
+
+	/* Configure the channels */
+	regmap_field_write(i2s->field_txchansel,
+			   SUN4I_I2S_CHAN_SEL(params_channels(params)));
+
+	regmap_field_write(i2s->field_rxchansel,
+			   SUN4I_I2S_CHAN_SEL(params_channels(params)));
+
+
 	switch (params_physical_width(params)) {
 	case 16:
 		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
@@ -486,13 +514,6 @@ static int sun4i_i2s_startup(struct snd_pcm_substream *substream,
 			   SUN4I_I2S_CTRL_SDO_EN_MASK,
 			   SUN4I_I2S_CTRL_SDO_EN(0));
 
-	/* Enable the first two channels */
-	regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_SEL_REG,
-		     SUN4I_I2S_TX_CHAN_SEL(2));
-
-	/* Map them to the two first samples coming in */
-	regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_MAP_REG,
-		     SUN4I_I2S_TX_CHAN_MAP(0, 0) | SUN4I_I2S_TX_CHAN_MAP(1, 1));
 
 	return clk_prepare_enable(i2s->mod_clk);
 }
@@ -677,14 +698,51 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = {
 	.has_reset		= false,
 	.reg_offset_txdata	= SUN4I_I2S_FIFO_TX_REG,
 	.sun4i_i2s_regmap	= &sun4i_i2s_regmap_config,
+	.field_txchanmap	= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
+	.field_rxchanmap	= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
+	.field_txchansel	= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
+	.field_rxchansel	= REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
 };
 
 static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
 	.has_reset		= true,
 	.reg_offset_txdata	= SUN4I_I2S_FIFO_TX_REG,
 	.sun4i_i2s_regmap	= &sun4i_i2s_regmap_config,
+	.field_txchanmap	= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
+	.field_rxchanmap	= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
+	.field_txchansel	= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
+	.field_rxchansel	= REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
 };
 
+static int sun4i_i2s_init_regmap_fields(struct device *dev, struct sun4i_i2s *i2s)
+{
+	i2s->field_txchanmap =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_txchanmap);
+	if (IS_ERR(i2s->field_txchanmap))
+		return PTR_ERR(i2s->field_txchanmap);
+
+	i2s->field_rxchanmap =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_rxchanmap);
+	if (IS_ERR(i2s->field_rxchanmap))
+		return PTR_ERR(i2s->field_rxchanmap);
+
+	i2s->field_txchansel =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_txchansel);
+	if (IS_ERR(i2s->field_txchansel))
+		return PTR_ERR(i2s->field_txchansel);
+
+	i2s->field_rxchansel =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_rxchansel);
+	if (IS_ERR(i2s->field_rxchansel))
+		return PTR_ERR(i2s->field_rxchansel);
+
+	return 0;
+}
+
 static int sun4i_i2s_probe(struct platform_device *pdev)
 {
 	struct sun4i_i2s *i2s;
@@ -778,6 +836,12 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
 		goto err_suspend;
 	}
 
+	ret = sun4i_i2s_init_regmap_fields(&pdev->dev, i2s);
+	if (ret) {
+		dev_err(&pdev->dev, "Could not initialise regmap fields\n");
+		goto err_suspend;
+	}
+
 	return 0;
 
 err_suspend:
-- 
2.13.3

WARNING: multiple messages have this Message-ID (diff)
From: codekipper@gmail.com (codekipper at gmail.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 05/12] ASoC: sun4i-i2s: Add regmap fields for channels
Date: Sat, 29 Jul 2017 16:17:46 +0200	[thread overview]
Message-ID: <20170729141753.20174-6-codekipper@gmail.com> (raw)
In-Reply-To: <20170729141753.20174-1-codekipper@gmail.com>

From: Marcus Cooper <codekipper@gmail.com>

On the original i2s block the channel mapping and selection were
configured for stereo audio by default: This is not the case with
the newer SoCs and they are also located at different offsets.

To support the newer SoC then regmap fields have been added to the
quirks and these are initialised to their correct settings during
probing.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
---
 sound/soc/sunxi/sun4i-i2s.c | 80 ++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 72 insertions(+), 8 deletions(-)

diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index 2a25df22c2f8..120f797a38e8 100644
--- a/sound/soc/sunxi/sun4i-i2s.c
+++ b/sound/soc/sunxi/sun4i-i2s.c
@@ -82,7 +82,7 @@
 #define SUN4I_I2S_TX_CNT_REG		0x2c
 
 #define SUN4I_I2S_TX_CHAN_SEL_REG	0x30
-#define SUN4I_I2S_TX_CHAN_SEL(num_chan)		(((num_chan) - 1) << 0)
+#define SUN4I_I2S_CHAN_SEL(num_chan)		(((num_chan) - 1) << 0)
 
 #define SUN4I_I2S_TX_CHAN_MAP_REG	0x34
 #define SUN4I_I2S_TX_CHAN_MAP(chan, sample)	((sample) << (chan << 2))
@@ -98,6 +98,10 @@
  * @sun4i_i2s_regmap: regmap config to use.
  * @mclk_offset: Value by which mclkdiv needs to be adjusted.
  * @bclk_offset: Value by which bclkdiv needs to be adjusted.
+ * @field_txchanmap: location of the tx channel mapping register.
+ * @field_rxchanmap: location of the rx channel mapping register.
+ * @field_txchansel: location of the tx channel select bit fields.
+ * @field_rxchansel: location of the rx channel select bit fields.
  */
 struct sun4i_i2s_quirks {
 	bool				has_reset;
@@ -105,6 +109,12 @@ struct sun4i_i2s_quirks {
 	const struct regmap_config	*sun4i_i2s_regmap;
 	unsigned int			mclk_offset;
 	unsigned int			bclk_offset;
+
+	/* Register fields for i2s */
+	struct reg_field		field_txchanmap;
+	struct reg_field		field_rxchanmap;
+	struct reg_field		field_txchansel;
+	struct reg_field		field_rxchansel;
 };
 
 struct sun4i_i2s {
@@ -118,6 +128,12 @@ struct sun4i_i2s {
 	struct snd_dmaengine_dai_dma_data	capture_dma_data;
 	struct snd_dmaengine_dai_dma_data	playback_dma_data;
 
+	/* Register fields for i2s */
+	struct regmap_field	*field_txchanmap;
+	struct regmap_field	*field_rxchanmap;
+	struct regmap_field	*field_txchansel;
+	struct regmap_field	*field_rxchansel;
+
 	const struct sun4i_i2s_quirks	*variant;
 };
 
@@ -264,6 +280,18 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
 	if (params_channels(params) != 2)
 		return -EINVAL;
 
+	/* Map the channels for playback and capture */
+	regmap_field_write(i2s->field_txchanmap, 0x76543210);
+	regmap_field_write(i2s->field_rxchanmap, 0x00003210);
+
+	/* Configure the channels */
+	regmap_field_write(i2s->field_txchansel,
+			   SUN4I_I2S_CHAN_SEL(params_channels(params)));
+
+	regmap_field_write(i2s->field_rxchansel,
+			   SUN4I_I2S_CHAN_SEL(params_channels(params)));
+
+
 	switch (params_physical_width(params)) {
 	case 16:
 		width = DMA_SLAVE_BUSWIDTH_2_BYTES;
@@ -486,13 +514,6 @@ static int sun4i_i2s_startup(struct snd_pcm_substream *substream,
 			   SUN4I_I2S_CTRL_SDO_EN_MASK,
 			   SUN4I_I2S_CTRL_SDO_EN(0));
 
-	/* Enable the first two channels */
-	regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_SEL_REG,
-		     SUN4I_I2S_TX_CHAN_SEL(2));
-
-	/* Map them to the two first samples coming in */
-	regmap_write(i2s->regmap, SUN4I_I2S_TX_CHAN_MAP_REG,
-		     SUN4I_I2S_TX_CHAN_MAP(0, 0) | SUN4I_I2S_TX_CHAN_MAP(1, 1));
 
 	return clk_prepare_enable(i2s->mod_clk);
 }
@@ -677,14 +698,51 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = {
 	.has_reset		= false,
 	.reg_offset_txdata	= SUN4I_I2S_FIFO_TX_REG,
 	.sun4i_i2s_regmap	= &sun4i_i2s_regmap_config,
+	.field_txchanmap	= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
+	.field_rxchanmap	= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
+	.field_txchansel	= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
+	.field_rxchansel	= REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
 };
 
 static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
 	.has_reset		= true,
 	.reg_offset_txdata	= SUN4I_I2S_FIFO_TX_REG,
 	.sun4i_i2s_regmap	= &sun4i_i2s_regmap_config,
+	.field_txchanmap	= REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
+	.field_rxchanmap	= REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
+	.field_txchansel	= REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
+	.field_rxchansel	= REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
 };
 
+static int sun4i_i2s_init_regmap_fields(struct device *dev, struct sun4i_i2s *i2s)
+{
+	i2s->field_txchanmap =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_txchanmap);
+	if (IS_ERR(i2s->field_txchanmap))
+		return PTR_ERR(i2s->field_txchanmap);
+
+	i2s->field_rxchanmap =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_rxchanmap);
+	if (IS_ERR(i2s->field_rxchanmap))
+		return PTR_ERR(i2s->field_rxchanmap);
+
+	i2s->field_txchansel =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_txchansel);
+	if (IS_ERR(i2s->field_txchansel))
+		return PTR_ERR(i2s->field_txchansel);
+
+	i2s->field_rxchansel =
+		devm_regmap_field_alloc(dev, i2s->regmap,
+					i2s->variant->field_rxchansel);
+	if (IS_ERR(i2s->field_rxchansel))
+		return PTR_ERR(i2s->field_rxchansel);
+
+	return 0;
+}
+
 static int sun4i_i2s_probe(struct platform_device *pdev)
 {
 	struct sun4i_i2s *i2s;
@@ -778,6 +836,12 @@ static int sun4i_i2s_probe(struct platform_device *pdev)
 		goto err_suspend;
 	}
 
+	ret = sun4i_i2s_init_regmap_fields(&pdev->dev, i2s);
+	if (ret) {
+		dev_err(&pdev->dev, "Could not initialise regmap fields\n");
+		goto err_suspend;
+	}
+
 	return 0;
 
 err_suspend:
-- 
2.13.3

  parent reply	other threads:[~2017-07-29 14:19 UTC|newest]

Thread overview: 103+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-29 14:17 [PATCH v3 00/12] ASoC: Add I2S support for Allwinner H3 SoCs codekipper
2017-07-29 14:17 ` codekipper at gmail.com
2017-07-29 14:17 ` codekipper
2017-07-29 14:17 ` [PATCH v3 01/12] ASoC: sun4i-i2s: Extend quirks scope codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-01  2:50   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-01  2:50     ` Chen-Yu Tsai
2017-08-01  2:50     ` Chen-Yu Tsai
2017-08-01 14:16   ` Applied "ASoC: sun4i-i2s: Extend quirks scope" to the asoc tree Mark Brown
2017-08-01 14:16     ` Mark Brown
2017-08-01 14:16     ` Mark Brown
2017-07-29 14:17 ` [PATCH v3 02/12] ASoC: sun4i-i2s: Add clkdiv offsets to quirks codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-01  2:55   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-01  2:55     ` Chen-Yu Tsai
2017-08-01  2:55     ` Chen-Yu Tsai
2017-08-07  6:20     ` [linux-sunxi] " Code Kipper
2017-08-07  6:20       ` Code Kipper
2017-07-29 14:17 ` [PATCH v3 03/12] ASoC: sun4i-i2s: Add regmap config " codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-01  8:10   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-01  8:10     ` Chen-Yu Tsai
2017-08-01  8:10     ` Chen-Yu Tsai
2017-08-14 16:43   ` Applied "ASoC: sun4i-i2s: Add regmap config to quirks" to the asoc tree Mark Brown
2017-08-14 16:43     ` Mark Brown
2017-08-14 16:43     ` Mark Brown
2017-07-29 14:17 ` [PATCH v3 04/12] ASoC: sun4i-i2s: Add TX FIFO offset to quirks codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-01  8:18   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-01  8:18     ` Chen-Yu Tsai
2017-08-01  8:18     ` Chen-Yu Tsai
2017-08-14 16:43   ` Applied "ASoC: sun4i-i2s: Add TX FIFO offset to quirks" to the asoc tree Mark Brown
2017-08-14 16:43     ` Mark Brown
2017-08-14 16:43     ` Mark Brown
2017-07-29 14:17 ` codekipper [this message]
2017-07-29 14:17   ` [PATCH v3 05/12] ASoC: sun4i-i2s: Add regmap fields for channels codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-07-30 16:43   ` [alsa-devel] " kbuild test robot
2017-07-30 16:43     ` kbuild test robot
2017-07-30 16:43     ` kbuild test robot
2017-07-30 16:43   ` [PATCH] ASoC: sun4i-i2s: fix ptr_ret.cocci warnings kbuild test robot
2017-07-30 16:43     ` kbuild test robot
2017-07-30 16:43     ` kbuild test robot
2017-08-01  8:31   ` [linux-sunxi] [PATCH v3 05/12] ASoC: sun4i-i2s: Add regmap fields for channels Chen-Yu Tsai
2017-08-01  8:31     ` Chen-Yu Tsai
2017-08-01  8:31     ` Chen-Yu Tsai
2017-08-07  7:39     ` [linux-sunxi] " Code Kipper
2017-08-07  7:39       ` Code Kipper
2017-08-07  7:39       ` Code Kipper
2017-07-29 14:17 ` [PATCH v3 06/12] ASoC: sun4i-i2s: Add changes for wss and sr codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-01  8:49   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-01  8:49     ` Chen-Yu Tsai
2017-08-01  8:49     ` Chen-Yu Tsai
2017-08-02  3:06   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-02  3:06     ` Chen-Yu Tsai
2017-08-02  3:06     ` Chen-Yu Tsai
2017-07-29 14:17 ` [PATCH v3 07/12] ASoC: sun4i-i2s: bclk and lrclk polarity tidyup codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-02  3:09   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-02  3:09     ` Chen-Yu Tsai
2017-08-02  3:09     ` Chen-Yu Tsai
2017-07-29 14:17 ` [PATCH v3 08/12] ASoC: sun4i-i2s: Add mclk enable regmap field codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-02  3:20   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-02  3:20     ` Chen-Yu Tsai
2017-08-02  3:20     ` Chen-Yu Tsai
2017-07-29 14:17 ` [PATCH v3 09/12] ASoC: sun4i-i2s: Add regmap field to set format codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-02  3:32   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-02  3:32     ` Chen-Yu Tsai
2017-08-02  3:32     ` Chen-Yu Tsai
2017-07-29 14:17 ` [PATCH v3 10/12] ASoC: sun4i-i2s: Check for slave select bit codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-02  3:50   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-02  3:50     ` Chen-Yu Tsai
2017-07-29 14:17 ` [PATCH v3 11/12] ASoC: sun4i-i2s: Update global enable with bitmask codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-02  3:55   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-02  3:55     ` Chen-Yu Tsai
2017-08-02  3:55     ` Chen-Yu Tsai
2017-07-29 14:17 ` [PATCH v3 12/12] ASoC: sun4i-i2s: Add support for H3 codekipper
2017-07-29 14:17   ` codekipper at gmail.com
2017-07-29 14:17   ` codekipper-Re5JQEeQqe8AvxtiuMwx3w
2017-08-02  4:37   ` [linux-sunxi] " Chen-Yu Tsai
2017-08-02  4:37     ` Chen-Yu Tsai
2017-08-02  4:37     ` Chen-Yu Tsai
2017-07-31  7:05 ` [linux-sunxi] [PATCH v3 00/12] ASoC: Add I2S support for Allwinner H3 SoCs Olliver Schinagl
2017-07-31  7:05   ` Olliver Schinagl
2017-07-31  7:05   ` Olliver Schinagl
2017-07-31 14:22   ` [linux-sunxi] " Code Kipper
2017-07-31 14:22     ` Code Kipper
2017-07-31 14:22     ` Code Kipper

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