From: Stafford Horne <shorne@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Development <qemu-devel@nongnu.org>,
Openrisc <openrisc@lists.librecores.org>
Subject: Re: [Qemu-devel] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable
Date: Fri, 13 Oct 2017 23:31:54 +0900 [thread overview]
Message-ID: <20171013143154.GF2958@lianli.shorne-pla.net> (raw)
In-Reply-To: <068db9d2-2805-2dac-4c19-efc6d187db44@linaro.org>
On Fri, Oct 13, 2017 at 06:58:21AM -0700, Richard Henderson wrote:
> On 10/13/2017 06:49 AM, Stafford Horne wrote:
> > Previously coreid and numcores were hard coded as 0 and 1 respectively
> > as OpenRISC QEMU did not have multicore support.
> >
> > Multicore support is now being added so these registers need to have
> > configured values.
> >
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> > target/openrisc/sys_helper.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~
Thank you for the review.
-Stafford
WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable
Date: Fri, 13 Oct 2017 23:31:54 +0900 [thread overview]
Message-ID: <20171013143154.GF2958@lianli.shorne-pla.net> (raw)
In-Reply-To: <068db9d2-2805-2dac-4c19-efc6d187db44@linaro.org>
On Fri, Oct 13, 2017 at 06:58:21AM -0700, Richard Henderson wrote:
> On 10/13/2017 06:49 AM, Stafford Horne wrote:
> > Previously coreid and numcores were hard coded as 0 and 1 respectively
> > as OpenRISC QEMU did not have multicore support.
> >
> > Multicore support is now being added so these registers need to have
> > configured values.
> >
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> > target/openrisc/sys_helper.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~
Thank you for the review.
-Stafford
next prev parent reply other threads:[~2017-10-13 14:32 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-13 13:49 [Qemu-devel] [PATCH v2 0/5] OpenRISC SMP Support Stafford Horne
2017-10-13 13:49 ` [OpenRISC] " Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 1/5] openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) Stafford Horne
2017-10-13 13:49 ` [OpenRISC] " Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable Stafford Horne
2017-10-13 13:49 ` [OpenRISC] " Stafford Horne
2017-10-13 13:58 ` [Qemu-devel] " Richard Henderson
2017-10-13 13:58 ` [OpenRISC] " Richard Henderson
2017-10-13 14:31 ` Stafford Horne [this message]
2017-10-13 14:31 ` Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 3/5] openrisc/cputimer: Perparation for Multicore Stafford Horne
2017-10-13 13:49 ` [OpenRISC] " Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 4/5] openrisc: Initial SMP support Stafford Horne
2017-10-13 13:49 ` [OpenRISC] " Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 5/5] openrisc: Only kick cpu on timeout, not on update Stafford Horne
2017-10-13 13:49 ` [OpenRISC] " Stafford Horne
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