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From: Thierry Escande <thierry.escande@collabora.com>
To: Archit Taneja <architt@codeaurora.org>,
	Inki Dae <inki.dae@samsung.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Sandy Huang <hjc@rock-chips.com>,
	Sean Paul <seanpaul@chromium.org>,
	David Airlie <airlied@linux.ie>, Tomasz Figa <tfiga@chromium.org>
Cc: "Haixia Shi" <hshi@chromium.org>,
	"Ørjan Eide" <orjan.eide@arm.com>,
	"Zain Wang" <wzz@rock-chips.com>,
	"Yakir Yang" <ykk@rock-chips.com>,
	"Lin Huang" <hl@rock-chips.com>,
	"Douglas Anderson" <dianders@chromium.org>,
	"Mark Yao" <mark.yao@rock-chips.com>,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v2 34/43] drm/rockchip: pre dither down when output bpc is 8bit
Date: Fri, 26 Jan 2018 14:17:01 +0100	[thread overview]
Message-ID: <20180126131710.7622-35-thierry.escande@collabora.com> (raw)
In-Reply-To: <20180126131710.7622-1-thierry.escande@collabora.com>

From: Mark Yao <mark.yao@rock-chips.com>

Some encoder have a crc verification check, crc check fail if
input and output data is not equal.

That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.

So pre dither down vop data to 8bit if panel's bpc is 8.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
[seanpaul resolved conflict in rockchip_drm_vop.c]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 2 ++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 6 ++++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c     | 1 +
 5 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8c884f9ce713..b3f46ed24cdc 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -218,6 +218,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 				      struct drm_connector_state *conn_state)
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+	struct drm_display_info *di = &conn_state->connector->display_info;
 
 	/*
 	 * The hardware IC designed that VOP must output the RGB10 video
@@ -229,6 +230,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 
 	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	s->output_type = DRM_MODE_CONNECTOR_eDP;
+	s->output_bpc = di->bpc;
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 9c064a40458b..3a6ebfc26036 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -36,6 +36,7 @@ struct rockchip_crtc_state {
 	struct drm_crtc_state base;
 	int output_type;
 	int output_mode;
+	int output_bpc;
 };
 #define to_rockchip_crtc_state(s) \
 		container_of(s, struct rockchip_crtc_state, base)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index bf4b1a2f3fa4..4abb9d72d814 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -937,6 +937,12 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
 	    !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
 		s->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8)
+		VOP_REG_SET(vop, common, pre_dither_down, 1);
+	else
+		VOP_REG_SET(vop, common, pre_dither_down, 0);
+
 	VOP_REG_SET(vop, common, out_mode, s->output_mode);
 
 	VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 56bbd2e2a8ef..084acdd0019a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -67,6 +67,7 @@ struct vop_common {
 	struct vop_reg cfg_done;
 	struct vop_reg dsp_blank;
 	struct vop_reg data_blank;
+	struct vop_reg pre_dither_down;
 	struct vop_reg dither_down;
 	struct vop_reg dither_up;
 	struct vop_reg gate_en;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 2e4eea3459fe..08023d3ecb76 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -264,6 +264,7 @@ static const struct vop_common rk3288_common = {
 	.standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22),
 	.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
 	.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
+	.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
 	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
-- 
2.14.1

WARNING: multiple messages have this Message-ID (diff)
From: Thierry Escande <thierry.escande-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
To: Archit Taneja <architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Inki Dae <inki.dae-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Sandy Huang <hjc-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
	Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: "Zain Wang" <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	"Lin Huang" <hl-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	"Douglas Anderson"
	<dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	"Yakir Yang" <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	"Ørjan Eide" <orjan.eide-5wv7dgnIgG8@public.gmane.org>,
	"Mark Yao" <mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	"Haixia Shi" <hshi-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Subject: [PATCH v2 34/43] drm/rockchip: pre dither down when output bpc is 8bit
Date: Fri, 26 Jan 2018 14:17:01 +0100	[thread overview]
Message-ID: <20180126131710.7622-35-thierry.escande@collabora.com> (raw)
In-Reply-To: <20180126131710.7622-1-thierry.escande-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>

From: Mark Yao <mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

Some encoder have a crc verification check, crc check fail if
input and output data is not equal.

That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.

So pre dither down vop data to 8bit if panel's bpc is 8.

Signed-off-by: Mark Yao <mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
[seanpaul resolved conflict in rockchip_drm_vop.c]
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Thierry Escande <thierry.escande-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 2 ++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 6 ++++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c     | 1 +
 5 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8c884f9ce713..b3f46ed24cdc 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -218,6 +218,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 				      struct drm_connector_state *conn_state)
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+	struct drm_display_info *di = &conn_state->connector->display_info;
 
 	/*
 	 * The hardware IC designed that VOP must output the RGB10 video
@@ -229,6 +230,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 
 	s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	s->output_type = DRM_MODE_CONNECTOR_eDP;
+	s->output_bpc = di->bpc;
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 9c064a40458b..3a6ebfc26036 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -36,6 +36,7 @@ struct rockchip_crtc_state {
 	struct drm_crtc_state base;
 	int output_type;
 	int output_mode;
+	int output_bpc;
 };
 #define to_rockchip_crtc_state(s) \
 		container_of(s, struct rockchip_crtc_state, base)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index bf4b1a2f3fa4..4abb9d72d814 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -937,6 +937,12 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
 	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
 	    !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
 		s->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8)
+		VOP_REG_SET(vop, common, pre_dither_down, 1);
+	else
+		VOP_REG_SET(vop, common, pre_dither_down, 0);
+
 	VOP_REG_SET(vop, common, out_mode, s->output_mode);
 
 	VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 56bbd2e2a8ef..084acdd0019a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -67,6 +67,7 @@ struct vop_common {
 	struct vop_reg cfg_done;
 	struct vop_reg dsp_blank;
 	struct vop_reg data_blank;
+	struct vop_reg pre_dither_down;
 	struct vop_reg dither_down;
 	struct vop_reg dither_up;
 	struct vop_reg gate_en;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 2e4eea3459fe..08023d3ecb76 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -264,6 +264,7 @@ static const struct vop_common rk3288_common = {
 	.standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22),
 	.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
 	.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
+	.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
 	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
-- 
2.14.1

  parent reply	other threads:[~2018-01-26 13:20 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-26 13:16 [PATCH v2 00/43] DRM Rockchip rk3399 (Kevin) Thierry Escande
2018-01-26 13:16 ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 01/43] drm/rockchip: Get rid of unnecessary struct fields Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-29 20:44   ` Sean Paul
2018-01-30  2:21   ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 02/43] drm/rockchip: support prime import sg table Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-30  2:40   ` Sandy Huang
2018-01-30  2:40     ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 03/43] drm/rockchip: Respect page offset for PRIME mmap calls Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-30  2:42   ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 04/43] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 05/43] drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 06/43] drm/rockchip: Don't use atomic constructs for psr Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 07/43] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR Thierry Escande
2018-01-26 13:16 ` [PATCH v2 08/43] drm/rockchip: Remove analogix psr worker Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 09/43] drm/bridge: analogix_dp: Don't change psr while bridge is disabled Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 10/43] drm/rockchip: add mutex vop lock Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-30  2:55   ` Sandy Huang
2018-01-30  2:55     ` Sandy Huang
2018-01-26 13:16 ` [PATCH v2 11/43] drm/bridge: analogix_dp: add fast link train for eDP Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 12/43] drm/rockchip: Only wait for panel ACK on PSR entry Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 13/43] drm/bridge: analogix_dp: Move enable video into config_video() Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 14/43] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 15/43] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Thierry Escande
2018-01-26 13:16 ` [PATCH v2 16/43] drm/bridge: analogix_dp: Retry bridge enable when it failed Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 17/43] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 18/43] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 19/43] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 20/43] drm/bridge: analogix_dp: Extend hpd check time to 100ms Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-29 21:02   ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 21/43] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 22/43] drm/bridge: analogix_dp: Check dpcd write/read status Thierry Escande
2018-01-29 21:14   ` Sean Paul
2018-01-29 21:31     ` Sean Paul
2018-01-29 21:31       ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 23/43] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 24/43] drm/bridge: analogix_dp: Reset aux channel if an error occurred Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-29 21:27   ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 25/43] drm/rockchip: Restore psr->state when enable/disable psr failed Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 26/43] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 27/43] drm/bridge: analogix_dp: Fix timeout of video streamclk config Thierry Escande
2018-01-26 13:16 ` [PATCH v2 28/43] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-29 21:35   ` Sean Paul
2018-01-29 21:35     ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 29/43] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-29 21:38   ` Sean Paul
2018-01-29 21:38     ` Sean Paul
2018-01-26 13:16 ` [PATCH v2 30/43] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 31/43] drm/bridge: analogix_dp: Properly log AUX CH errors Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:16 ` [PATCH v2 32/43] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Thierry Escande
2018-01-26 13:16   ` Thierry Escande
2018-01-26 13:17 ` [PATCH v2 33/43] drm/panel: simple: Change mode for Sharp lq123p1jx31 Thierry Escande
2018-01-26 13:17 ` Thierry Escande [this message]
2018-01-26 13:17   ` [PATCH v2 34/43] drm/rockchip: pre dither down when output bpc is 8bit Thierry Escande
2018-01-26 13:17 ` [PATCH v2 35/43] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Thierry Escande
2018-01-26 13:17   ` Thierry Escande
2018-01-26 13:17 ` [PATCH v2 36/43] drm/rockchip: analogix_dp: Do not call Analogix code before bind Thierry Escande
2018-01-26 13:17   ` Thierry Escande
2018-01-26 13:17 ` [PATCH v2 37/43] drm/rockchip: Disable PSR on input events Thierry Escande
2018-01-29 21:44   ` Sean Paul
2018-01-26 13:17 ` [PATCH v2 38/43] drm/rockchip: Cancel PSR enable work before changing the state Thierry Escande
2018-01-26 13:17 ` [PATCH v2 39/43] drm/rockchip: psr: Avoid redundant calls to .set() callback Thierry Escande
2018-01-26 13:17 ` [PATCH v2 40/43] drm/rockchip: psr: Sanitize semantics of allow/disallow API Thierry Escande
2018-01-26 13:17 ` [PATCH v2 41/43] drm/rockchip: Disable PSR from reboot notifier Thierry Escande
2018-01-26 13:17 ` [PATCH v2 42/43] drm/rockchip: Disallow PSR for the whole atomic commit Thierry Escande
2018-01-26 13:17 ` [PATCH v2 43/43] drm/rockchip: psr: Remove flush by CRTC Thierry Escande
2018-01-28  0:41 ` [PATCH v2 00/43] DRM Rockchip rk3399 (Kevin) Emil Renner Berthing
2018-01-29 21:51 ` Sean Paul
2018-01-29 21:51   ` Sean Paul

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