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From: Jerome Brunet <jbrunet@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Carlo Caione <carlo@caione.org>,
	linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 19/19] clk: meson: use hhi syscon if available
Date: Wed, 31 Jan 2018 19:09:45 +0100	[thread overview]
Message-ID: <20180131180945.18025-20-jbrunet@baylibre.com> (raw)
In-Reply-To: <20180131180945.18025-1-jbrunet@baylibre.com>

On gxbb and axg, try to get the hhi regmap from the parent DT node, which
should be the HHI system controller once the necessary changes have been
made in amlogic's DTs

Until then, if getting regmap through the system controller fails, the
clock controller will fall back to the old way, requesting memory region
directly and then registering the regmap itself.

This should allow a smooth transition to syscon

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/Kconfig |  2 ++
 drivers/clk/meson/axg.c   | 43 ++++++++++++++++++++++++++++++-------------
 drivers/clk/meson/gxbb.c  | 39 ++++++++++++++++++++++++++++-----------
 3 files changed, 60 insertions(+), 24 deletions(-)

diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
index 936afddae406..d5cbec522aec 100644
--- a/drivers/clk/meson/Kconfig
+++ b/drivers/clk/meson/Kconfig
@@ -22,6 +22,7 @@ config COMMON_CLK_GXBB
 	depends on COMMON_CLK_AMLOGIC
 	select RESET_CONTROLLER
 	select COMMON_CLK_REGMAP_MESON
+	select MFD_SYSCON
 	help
 	  Support for the clock controller on AmLogic S905 devices, aka gxbb.
 	  Say Y if you want peripherals and CPU frequency scaling to work.
@@ -31,6 +32,7 @@ config COMMON_CLK_AXG
 	depends on COMMON_CLK_AMLOGIC
 	select RESET_CONTROLLER
 	select COMMON_CLK_REGMAP_MESON
+	select MFD_SYSCON
 	help
 	  Support for the clock controller on AmLogic A113D devices, aka axg.
 	  Say Y if you want peripherals and CPU frequency scaling to work.
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index ae1dd35246f5..8c455f8c1d91 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
+#include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
 
@@ -850,25 +851,41 @@ static int axg_clkc_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct resource *res;
-	void __iomem *clk_base;
+	void __iomem *clk_base = NULL;
 	struct regmap *map;
 	int ret, i;
 
-	/*  Generic clocks and PLLs */
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!res)
-		return -EINVAL;
+	/* Get the hhi system controller node if available */
+	map = syscon_node_to_regmap(of_get_parent(dev->of_node));
+	if (IS_ERR(map)) {
+		dev_err(dev,
+			"failed to get HHI regmap - Trying obsolete regs\n");
+
+		/*
+		 * FIXME: HHI registers should be accessed through
+		 * the appropriate system controller. This is required because
+		 * there is more than just clocks in this register space
+		 *
+		 * This fallback method is only provided temporarily until
+		 * all the platform DTs are properly using the syscon node
+		 */
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+		if (!res)
+			return -EINVAL;
+
+
+		clk_base = devm_ioremap(dev, res->start, resource_size(res));
+		if (!clk_base) {
+			dev_err(dev, "Unable to map clk base\n");
+			return -ENXIO;
+		}
 
-	clk_base = devm_ioremap(dev, res->start, resource_size(res));
-	if (!clk_base) {
-		dev_err(dev, "Unable to map clk base\n");
-		return -ENXIO;
+		map = devm_regmap_init_mmio(dev, clk_base,
+					    &clkc_regmap_config);
+		if (IS_ERR(map))
+			return PTR_ERR(map);
 	}
 
-	map = devm_regmap_init_mmio(dev, clk_base, &clkc_regmap_config);
-	if (IS_ERR(map))
-		return PTR_ERR(map);
-
 	/* Populate regmap for the regmap backed clocks */
 	for (i = 0; i < ARRAY_SIZE(axg_clk_regmaps); i++)
 		axg_clk_regmaps[i]->map = map;
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 92403ab2daf5..f9acd4015a1c 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -22,6 +22,7 @@
 #include <linux/init.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
+#include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
 
@@ -2042,19 +2043,35 @@ static int gxbb_clkc_probe(struct platform_device *pdev)
 	if (!clkc_data)
 		return -EINVAL;
 
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!res)
-		return -EINVAL;
+	/* Get the hhi system controller node if available */
+	map = syscon_node_to_regmap(of_get_parent(dev->of_node));
+	if (IS_ERR(map)) {
+		dev_err(dev,
+			"failed to get HHI regmap - Trying obsolete regs\n");
 
-	clk_base = devm_ioremap(dev, res->start, resource_size(res));
-	if (!clk_base) {
-		pr_err("%s: Unable to map clk base\n", __func__);
-		return -ENXIO;
-	}
+		/*
+		 * FIXME: HHI registers should be accessed through
+		 * the appropriate system controller. This is required because
+		 * there is more than just clocks in this register space
+		 *
+		 * This fallback method is only provided temporarily until
+		 * all the platform DTs are properly using the syscon node
+		 */
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+		if (!res)
+			return -EINVAL;
+
+		clk_base = devm_ioremap(dev, res->start, resource_size(res));
+		if (!clk_base) {
+			dev_err(dev, "Unable to map clk base\n");
+			return -ENXIO;
+		}
 
-	map = devm_regmap_init_mmio(dev, clk_base, &clkc_regmap_config);
-	if (IS_ERR(map))
-		return PTR_ERR(map);
+		map = devm_regmap_init_mmio(dev, clk_base,
+					    &clkc_regmap_config);
+		if (IS_ERR(map))
+			return PTR_ERR(map);
+	}
 
 	/* Populate regmap for the common regmap backed clocks */
 	for (i = 0; i < ARRAY_SIZE(gx_clk_regmaps); i++)
-- 
2.14.3

WARNING: multiple messages have this Message-ID (diff)
From: jbrunet@baylibre.com (Jerome Brunet)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH 19/19] clk: meson: use hhi syscon if available
Date: Wed, 31 Jan 2018 19:09:45 +0100	[thread overview]
Message-ID: <20180131180945.18025-20-jbrunet@baylibre.com> (raw)
In-Reply-To: <20180131180945.18025-1-jbrunet@baylibre.com>

On gxbb and axg, try to get the hhi regmap from the parent DT node, which
should be the HHI system controller once the necessary changes have been
made in amlogic's DTs

Until then, if getting regmap through the system controller fails, the
clock controller will fall back to the old way, requesting memory region
directly and then registering the regmap itself.

This should allow a smooth transition to syscon

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/Kconfig |  2 ++
 drivers/clk/meson/axg.c   | 43 ++++++++++++++++++++++++++++++-------------
 drivers/clk/meson/gxbb.c  | 39 ++++++++++++++++++++++++++++-----------
 3 files changed, 60 insertions(+), 24 deletions(-)

diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
index 936afddae406..d5cbec522aec 100644
--- a/drivers/clk/meson/Kconfig
+++ b/drivers/clk/meson/Kconfig
@@ -22,6 +22,7 @@ config COMMON_CLK_GXBB
 	depends on COMMON_CLK_AMLOGIC
 	select RESET_CONTROLLER
 	select COMMON_CLK_REGMAP_MESON
+	select MFD_SYSCON
 	help
 	  Support for the clock controller on AmLogic S905 devices, aka gxbb.
 	  Say Y if you want peripherals and CPU frequency scaling to work.
@@ -31,6 +32,7 @@ config COMMON_CLK_AXG
 	depends on COMMON_CLK_AMLOGIC
 	select RESET_CONTROLLER
 	select COMMON_CLK_REGMAP_MESON
+	select MFD_SYSCON
 	help
 	  Support for the clock controller on AmLogic A113D devices, aka axg.
 	  Say Y if you want peripherals and CPU frequency scaling to work.
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index ae1dd35246f5..8c455f8c1d91 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
+#include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
 
@@ -850,25 +851,41 @@ static int axg_clkc_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct resource *res;
-	void __iomem *clk_base;
+	void __iomem *clk_base = NULL;
 	struct regmap *map;
 	int ret, i;
 
-	/*  Generic clocks and PLLs */
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!res)
-		return -EINVAL;
+	/* Get the hhi system controller node if available */
+	map = syscon_node_to_regmap(of_get_parent(dev->of_node));
+	if (IS_ERR(map)) {
+		dev_err(dev,
+			"failed to get HHI regmap - Trying obsolete regs\n");
+
+		/*
+		 * FIXME: HHI registers should be accessed through
+		 * the appropriate system controller. This is required because
+		 * there is more than just clocks in this register space
+		 *
+		 * This fallback method is only provided temporarily until
+		 * all the platform DTs are properly using the syscon node
+		 */
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+		if (!res)
+			return -EINVAL;
+
+
+		clk_base = devm_ioremap(dev, res->start, resource_size(res));
+		if (!clk_base) {
+			dev_err(dev, "Unable to map clk base\n");
+			return -ENXIO;
+		}
 
-	clk_base = devm_ioremap(dev, res->start, resource_size(res));
-	if (!clk_base) {
-		dev_err(dev, "Unable to map clk base\n");
-		return -ENXIO;
+		map = devm_regmap_init_mmio(dev, clk_base,
+					    &clkc_regmap_config);
+		if (IS_ERR(map))
+			return PTR_ERR(map);
 	}
 
-	map = devm_regmap_init_mmio(dev, clk_base, &clkc_regmap_config);
-	if (IS_ERR(map))
-		return PTR_ERR(map);
-
 	/* Populate regmap for the regmap backed clocks */
 	for (i = 0; i < ARRAY_SIZE(axg_clk_regmaps); i++)
 		axg_clk_regmaps[i]->map = map;
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 92403ab2daf5..f9acd4015a1c 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -22,6 +22,7 @@
 #include <linux/init.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
+#include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
 
@@ -2042,19 +2043,35 @@ static int gxbb_clkc_probe(struct platform_device *pdev)
 	if (!clkc_data)
 		return -EINVAL;
 
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!res)
-		return -EINVAL;
+	/* Get the hhi system controller node if available */
+	map = syscon_node_to_regmap(of_get_parent(dev->of_node));
+	if (IS_ERR(map)) {
+		dev_err(dev,
+			"failed to get HHI regmap - Trying obsolete regs\n");
 
-	clk_base = devm_ioremap(dev, res->start, resource_size(res));
-	if (!clk_base) {
-		pr_err("%s: Unable to map clk base\n", __func__);
-		return -ENXIO;
-	}
+		/*
+		 * FIXME: HHI registers should be accessed through
+		 * the appropriate system controller. This is required because
+		 * there is more than just clocks in this register space
+		 *
+		 * This fallback method is only provided temporarily until
+		 * all the platform DTs are properly using the syscon node
+		 */
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+		if (!res)
+			return -EINVAL;
+
+		clk_base = devm_ioremap(dev, res->start, resource_size(res));
+		if (!clk_base) {
+			dev_err(dev, "Unable to map clk base\n");
+			return -ENXIO;
+		}
 
-	map = devm_regmap_init_mmio(dev, clk_base, &clkc_regmap_config);
-	if (IS_ERR(map))
-		return PTR_ERR(map);
+		map = devm_regmap_init_mmio(dev, clk_base,
+					    &clkc_regmap_config);
+		if (IS_ERR(map))
+			return PTR_ERR(map);
+	}
 
 	/* Populate regmap for the common regmap backed clocks */
 	for (i = 0; i < ARRAY_SIZE(gx_clk_regmaps); i++)
-- 
2.14.3

  parent reply	other threads:[~2018-01-31 18:10 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-31 18:09 [PATCH 00/19] clk: meson: use regmap in clock controllers Jerome Brunet
2018-01-31 18:09 ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 01/19] clk: meson: use dev pointer where possible Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 02/19] clk: meson: use devm_of_clk_add_hw_provider Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 03/19] clk: meson: only one loop index is necessary in probe Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 04/19] clk: meson: remove obsolete comments Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 05/19] clk: meson: add regmap clocks Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-02-08  7:33   ` Yixun Lan
2018-02-08  7:33     ` Yixun Lan
2018-02-08  8:07     ` Jerome Brunet
2018-02-08  8:07       ` Jerome Brunet
2018-02-08  8:07       ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 06/19] clk: meson: switch gxbb ao_clk to clk_regmap Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 07/19] clk: meson: remove superseded aoclk_gate_regmap Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 08/19] clk: meson: add regmap to the clock controllers Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-02-03 18:53   ` Martin Blumenstingl
2018-02-03 18:53     ` Martin Blumenstingl
2018-02-05  9:51     ` Jerome Brunet
2018-02-05  9:51       ` Jerome Brunet
2018-02-05  9:51       ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 09/19] clk: meson: migrate gates to clk_regmap Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 10/19] clk: meson: migrate dividers " Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 11/19] clk: meson: migrate muxes " Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 12/19] clk: meson: add regmap helpers for parm Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 13/19] clk: meson: migrate mplls clocks to clk_regmap Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 14/19] clk: meson: migrate the audio divider clock " Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 15/19] clk: meson: migrate plls clocks " Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 16/19] clk: meson: split divider and gate part of mpll Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 17/19] clk: meson: rework meson8b cpu clock Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-02-03 18:46   ` Martin Blumenstingl
2018-02-03 18:46     ` Martin Blumenstingl
2018-02-05  9:49     ` Jerome Brunet
2018-02-05  9:49       ` Jerome Brunet
2018-02-05  9:49       ` Jerome Brunet
2018-01-31 18:09 ` [PATCH 18/19] clk: meson: remove obsolete cpu_clk Jerome Brunet
2018-01-31 18:09   ` Jerome Brunet
2018-02-03 18:48   ` Martin Blumenstingl
2018-02-03 18:48     ` Martin Blumenstingl
2018-01-31 18:09 ` Jerome Brunet [this message]
2018-01-31 18:09   ` [PATCH 19/19] clk: meson: use hhi syscon if available Jerome Brunet

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