From: Jernej Skrabec <jernej.skrabec@siol.net>
To: maxime.ripard@free-electrons.com, wens@csie.org,
airlied@linux.ie, robh+dt@kernel.org, mark.rutland@arm.com,
mturquette@baylibre.com, sboyd@kernel.org
Cc: jernej.skrabec@siol.net, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-sunxi@googlegroups.com
Subject: [PATCH v3 01/16] clk: sunxi-ng: Add check for minimal rate to NM PLLs
Date: Thu, 1 Mar 2018 22:34:27 +0100 [thread overview]
Message-ID: <20180301213442.16677-2-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20180301213442.16677-1-jernej.skrabec@siol.net>
Some NM PLLs doesn't work well when their output clock rate is set below
certain rate.
Add support for that constrain.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/clk/sunxi-ng/ccu_nm.c | 7 +++++++
drivers/clk/sunxi-ng/ccu_nm.h | 27 +++++++++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index a16de092bf94..4e2073307f34 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -117,6 +117,13 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nm->fixed_post_div;
+ if (rate < nm->min_rate) {
+ rate = nm->min_rate;
+ if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
+ rate /= nm->fixed_post_div;
+ return rate;
+ }
+
if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= nm->fixed_post_div;
diff --git a/drivers/clk/sunxi-ng/ccu_nm.h b/drivers/clk/sunxi-ng/ccu_nm.h
index eba586b4c7d0..1d8b459c50b7 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.h
+++ b/drivers/clk/sunxi-ng/ccu_nm.h
@@ -37,6 +37,7 @@ struct ccu_nm {
struct ccu_sdm_internal sdm;
unsigned int fixed_post_div;
+ unsigned int min_rate;
struct ccu_common common;
};
@@ -88,6 +89,32 @@ struct ccu_nm {
}, \
}
+#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent, \
+ _reg, _min_rate, \
+ _nshift, _nwidth, \
+ _mshift, _mwidth, \
+ _frac_en, _frac_sel, \
+ _frac_rate_0, _frac_rate_1,\
+ _gate, _lock, _flags) \
+ struct ccu_nm _struct = { \
+ .enable = _gate, \
+ .lock = _lock, \
+ .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
+ .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
+ .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \
+ _frac_rate_0, \
+ _frac_rate_1), \
+ .min_rate = _min_rate, \
+ .common = { \
+ .reg = _reg, \
+ .features = CCU_FEATURE_FRACTIONAL, \
+ .hw.init = CLK_HW_INIT(_name, \
+ _parent, \
+ &ccu_nm_ops, \
+ _flags), \
+ }, \
+ }
+
#define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
_nshift, _nwidth, \
_mshift, _mwidth, \
--
2.16.2
WARNING: multiple messages have this Message-ID (diff)
From: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
wens-jdAy2FN1RRM@public.gmane.org,
airlied-cv59FeDIM0c@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: jernej.skrabec-gGgVlfcn5nU@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: [PATCH v3 01/16] clk: sunxi-ng: Add check for minimal rate to NM PLLs
Date: Thu, 1 Mar 2018 22:34:27 +0100 [thread overview]
Message-ID: <20180301213442.16677-2-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20180301213442.16677-1-jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
Some NM PLLs doesn't work well when their output clock rate is set below
certain rate.
Add support for that constrain.
Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
---
drivers/clk/sunxi-ng/ccu_nm.c | 7 +++++++
drivers/clk/sunxi-ng/ccu_nm.h | 27 +++++++++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index a16de092bf94..4e2073307f34 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -117,6 +117,13 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nm->fixed_post_div;
+ if (rate < nm->min_rate) {
+ rate = nm->min_rate;
+ if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
+ rate /= nm->fixed_post_div;
+ return rate;
+ }
+
if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= nm->fixed_post_div;
diff --git a/drivers/clk/sunxi-ng/ccu_nm.h b/drivers/clk/sunxi-ng/ccu_nm.h
index eba586b4c7d0..1d8b459c50b7 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.h
+++ b/drivers/clk/sunxi-ng/ccu_nm.h
@@ -37,6 +37,7 @@ struct ccu_nm {
struct ccu_sdm_internal sdm;
unsigned int fixed_post_div;
+ unsigned int min_rate;
struct ccu_common common;
};
@@ -88,6 +89,32 @@ struct ccu_nm {
}, \
}
+#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent, \
+ _reg, _min_rate, \
+ _nshift, _nwidth, \
+ _mshift, _mwidth, \
+ _frac_en, _frac_sel, \
+ _frac_rate_0, _frac_rate_1,\
+ _gate, _lock, _flags) \
+ struct ccu_nm _struct = { \
+ .enable = _gate, \
+ .lock = _lock, \
+ .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
+ .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
+ .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \
+ _frac_rate_0, \
+ _frac_rate_1), \
+ .min_rate = _min_rate, \
+ .common = { \
+ .reg = _reg, \
+ .features = CCU_FEATURE_FRACTIONAL, \
+ .hw.init = CLK_HW_INIT(_name, \
+ _parent, \
+ &ccu_nm_ops, \
+ _flags), \
+ }, \
+ }
+
#define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
_nshift, _nwidth, \
_mshift, _mwidth, \
--
2.16.2
WARNING: multiple messages have this Message-ID (diff)
From: jernej.skrabec@siol.net (Jernej Skrabec)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 01/16] clk: sunxi-ng: Add check for minimal rate to NM PLLs
Date: Thu, 1 Mar 2018 22:34:27 +0100 [thread overview]
Message-ID: <20180301213442.16677-2-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20180301213442.16677-1-jernej.skrabec@siol.net>
Some NM PLLs doesn't work well when their output clock rate is set below
certain rate.
Add support for that constrain.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/clk/sunxi-ng/ccu_nm.c | 7 +++++++
drivers/clk/sunxi-ng/ccu_nm.h | 27 +++++++++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index a16de092bf94..4e2073307f34 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -117,6 +117,13 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate *= nm->fixed_post_div;
+ if (rate < nm->min_rate) {
+ rate = nm->min_rate;
+ if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
+ rate /= nm->fixed_post_div;
+ return rate;
+ }
+
if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= nm->fixed_post_div;
diff --git a/drivers/clk/sunxi-ng/ccu_nm.h b/drivers/clk/sunxi-ng/ccu_nm.h
index eba586b4c7d0..1d8b459c50b7 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.h
+++ b/drivers/clk/sunxi-ng/ccu_nm.h
@@ -37,6 +37,7 @@ struct ccu_nm {
struct ccu_sdm_internal sdm;
unsigned int fixed_post_div;
+ unsigned int min_rate;
struct ccu_common common;
};
@@ -88,6 +89,32 @@ struct ccu_nm {
}, \
}
+#define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent, \
+ _reg, _min_rate, \
+ _nshift, _nwidth, \
+ _mshift, _mwidth, \
+ _frac_en, _frac_sel, \
+ _frac_rate_0, _frac_rate_1,\
+ _gate, _lock, _flags) \
+ struct ccu_nm _struct = { \
+ .enable = _gate, \
+ .lock = _lock, \
+ .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
+ .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
+ .frac = _SUNXI_CCU_FRAC(_frac_en, _frac_sel, \
+ _frac_rate_0, \
+ _frac_rate_1), \
+ .min_rate = _min_rate, \
+ .common = { \
+ .reg = _reg, \
+ .features = CCU_FEATURE_FRACTIONAL, \
+ .hw.init = CLK_HW_INIT(_name, \
+ _parent, \
+ &ccu_nm_ops, \
+ _flags), \
+ }, \
+ }
+
#define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
_nshift, _nwidth, \
_mshift, _mwidth, \
--
2.16.2
next prev parent reply other threads:[~2018-03-01 21:40 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-01 21:34 [PATCH v3 00/16] Implement H3/H5 HDMI driver Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec [this message]
2018-03-01 21:34 ` [PATCH v3 01/16] clk: sunxi-ng: Add check for minimal rate to NM PLLs Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 02/16] clk: sunxi-ng: h3: h5: Add minimal rate for video PLL Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 03/16] clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 04/16] clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-07 19:36 ` Rob Herring
2018-03-07 19:36 ` Rob Herring
2018-03-01 21:34 ` [PATCH v3 05/16] dt-bindings: display: sun4i-drm: Add compatibles for H3 HDMI pipeline Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-07 19:37 ` Rob Herring
2018-03-07 19:37 ` Rob Herring
2018-03-01 21:34 ` [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-08 22:47 ` [linux-sunxi] " Ondřej Jirman
2018-03-08 22:47 ` Ondřej Jirman
2018-03-08 22:47 ` 'Ondřej Jirman' via linux-sunxi
2018-03-08 22:57 ` [linux-sunxi] " Jernej Škrabec
2018-03-08 22:57 ` Jernej Škrabec
2018-03-08 22:57 ` Jernej Škrabec
2018-03-08 22:57 ` Jernej Škrabec
2018-03-09 0:13 ` [linux-sunxi] " Ondřej Jirman
2018-03-09 0:13 ` Ondřej Jirman
2018-03-09 0:13 ` 'Ondřej Jirman' via linux-sunxi
2018-03-09 0:44 ` [linux-sunxi] " Ondřej Jirman
2018-03-09 0:44 ` Ondřej Jirman
2018-03-09 0:44 ` 'Ondřej Jirman' via linux-sunxi
2018-03-09 6:19 ` [linux-sunxi] " Jernej Škrabec
2018-03-09 6:19 ` Jernej Škrabec
2018-03-09 6:19 ` Jernej Škrabec
2018-03-09 7:55 ` Ondřej Jirman
2018-03-09 7:55 ` Ondřej Jirman
2018-03-09 7:55 ` 'Ondřej Jirman' via linux-sunxi
2018-03-01 21:34 ` [PATCH v3 07/16] drm/sun4i: Add support for H3 display engine Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 08/16] drm/sun4i: Add support for H3 mixer 0 Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 09/16] drm/sun4i: Fix polarity configuration for DW HDMI PHY Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 10/16] drm/sun4i: Add support for variants to " Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 11/16] drm/sun4i: Move and expand DW HDMI PHY register macros Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 12/16] drm/sun4i: Add support for H3 HDMI PHY variant Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 13/16] drm/sun4i: Allow building on arm64 Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 14/16] ARM: dts: sunxi: h3/h5: Add HDMI pipeline Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` [PATCH v3 15/16] ARM: dts: sun8i: h3: Enable HDMI output on H3 boards Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-05 15:27 ` [linux-sunxi] " Joonas Kylmälä
2018-03-05 15:27 ` Joonas Kylmälä
2018-03-05 15:27 ` Joonas Kylmälä
2018-03-05 18:24 ` [linux-sunxi] " Jernej Škrabec
2018-03-05 18:24 ` Jernej Škrabec
2018-03-05 18:24 ` Jernej Škrabec
2018-03-05 20:43 ` Joonas Kylmälä
2018-03-05 20:43 ` Joonas Kylmälä
2018-03-05 20:43 ` Joonas Kylmälä
2018-03-01 21:34 ` [PATCH v3 16/16] ARM64: dts: sun50i: h5: Enable HDMI output on H5 boards Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-01 21:34 ` Jernej Skrabec
2018-03-02 9:38 ` [PATCH v3 00/16] Implement H3/H5 HDMI driver Maxime Ripard
2018-03-02 9:38 ` Maxime Ripard
2018-03-02 9:38 ` Maxime Ripard
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