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From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: architt@codeaurora.org, inki.dae@samsung.com,
	thierry.reding@gmail.com, hjc@rock-chips.com,
	seanpaul@chromium.org, airlied@linux.ie, tfiga@chromium.org,
	heiko@sntech.de
Cc: dri-devel@lists.freedesktop.org, dianders@chromium.org,
	a.hajda@samsung.com, kernel@collabora.com,
	m.szyprowski@samsung.com, linux-samsung-soc@vger.kernel.org,
	jy0922.shim@samsung.com, rydberg@bitmath.org, krzk@kernel.org,
	linux-rockchip@lists.infradead.org, kgene@kernel.org,
	orjan.eide@arm.com, wxt@rock-chips.com,
	jeffy.chen@rock-chips.com, linux-arm-kernel@lists.infradead.org,
	wzz@rock-chips.com, hl@rock-chips.com, jingoohan1@gmail.com,
	sw0312.kim@samsung.com, linux-kernel@vger.kernel.org,
	kyungmin.park@samsung.com, Laurent.pinchart@ideasonboard.com,
	kuankuan.y@gmail.com, hshi@chromium.org,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>
Subject: [RESEND PATCH v6 17/27] drm/bridge: analogix_dp: Move fast link training detect to set_bridge
Date: Mon, 23 Apr 2018 12:49:53 +0200	[thread overview]
Message-ID: <20180423105003.9004-18-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20180423105003.9004-1-enric.balletbo@collabora.com>

From: zain wang <wzz@rock-chips.com>

It's too early to detect fast link training, if other step after it
failed, we will set fast_link flag to 1, and retry set_bridge again. In
this case we will power down and power up panel power supply, and we
will do fast link training since we have set fast_link flag to 1. In
fact, we should do full link training now, not the fast link training.
So we should move the fast link detection at the end of set_bridge.

Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
---

 .../drm/bridge/analogix/analogix_dp_core.c    | 42 ++++++++++++-------
 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index a72e454a7292..69b2c16e5776 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -601,7 +601,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 {
 	int lane, lane_count, retval;
 	u32 reg;
-	u8 link_align, link_status[2], adjust_request[2], spread;
+	u8 link_align, link_status[2], adjust_request[2];
 
 	usleep_range(400, 401);
 
@@ -645,20 +645,6 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		dev_dbg(dp->dev, "final lane count = %.2x\n",
 			dp->link_train.lane_count);
 
-		retval = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD,
-					   &spread);
-		if (retval != 1) {
-			dev_err(dp->dev, "failed to read downspread %d\n",
-				retval);
-			dp->fast_train_enable = false;
-		} else {
-			dp->fast_train_enable =
-				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
-					true : false;
-		}
-		dev_dbg(dp->dev, "fast link training %s\n",
-			dp->fast_train_enable ? "supported" : "unsupported");
-
 		dp->link_train.lt_state = FINISHED;
 
 		return 0;
@@ -996,6 +982,22 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
 	return IRQ_HANDLED;
 }
 
+static int analogix_dp_fast_link_train_detection(struct analogix_dp_device *dp)
+{
+	int ret;
+	u8 spread;
+
+	ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD, &spread);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to read downspread %d\n", ret);
+		return ret;
+	}
+	dp->fast_train_enable = !!(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
+	dev_dbg(dp->dev, "fast link training %s\n",
+		dp->fast_train_enable ? "supported" : "unsupported");
+	return 0;
+}
+
 static int analogix_dp_commit(struct analogix_dp_device *dp)
 {
 	int ret;
@@ -1038,8 +1040,16 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
 	if (ret)
 		return ret;
 
-	if (dp->psr_enable)
+	if (dp->psr_enable) {
 		ret = analogix_dp_enable_sink_psr(dp);
+		if (ret)
+			return ret;
+	}
+
+	/* Check whether panel supports fast training */
+	ret =  analogix_dp_fast_link_train_detection(dp);
+	if (ret)
+		dp->psr_enable = false;
 
 	return ret;
 }
-- 
2.17.0

WARNING: multiple messages have this Message-ID (diff)
From: enric.balletbo@collabora.com (Enric Balletbo i Serra)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH v6 17/27] drm/bridge: analogix_dp: Move fast link training detect to set_bridge
Date: Mon, 23 Apr 2018 12:49:53 +0200	[thread overview]
Message-ID: <20180423105003.9004-18-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20180423105003.9004-1-enric.balletbo@collabora.com>

From: zain wang <wzz@rock-chips.com>

It's too early to detect fast link training, if other step after it
failed, we will set fast_link flag to 1, and retry set_bridge again. In
this case we will power down and power up panel power supply, and we
will do fast link training since we have set fast_link flag to 1. In
fact, we should do full link training now, not the fast link training.
So we should move the fast link detection at the end of set_bridge.

Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
---

 .../drm/bridge/analogix/analogix_dp_core.c    | 42 ++++++++++++-------
 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index a72e454a7292..69b2c16e5776 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -601,7 +601,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 {
 	int lane, lane_count, retval;
 	u32 reg;
-	u8 link_align, link_status[2], adjust_request[2], spread;
+	u8 link_align, link_status[2], adjust_request[2];
 
 	usleep_range(400, 401);
 
@@ -645,20 +645,6 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		dev_dbg(dp->dev, "final lane count = %.2x\n",
 			dp->link_train.lane_count);
 
-		retval = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD,
-					   &spread);
-		if (retval != 1) {
-			dev_err(dp->dev, "failed to read downspread %d\n",
-				retval);
-			dp->fast_train_enable = false;
-		} else {
-			dp->fast_train_enable =
-				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
-					true : false;
-		}
-		dev_dbg(dp->dev, "fast link training %s\n",
-			dp->fast_train_enable ? "supported" : "unsupported");
-
 		dp->link_train.lt_state = FINISHED;
 
 		return 0;
@@ -996,6 +982,22 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
 	return IRQ_HANDLED;
 }
 
+static int analogix_dp_fast_link_train_detection(struct analogix_dp_device *dp)
+{
+	int ret;
+	u8 spread;
+
+	ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD, &spread);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to read downspread %d\n", ret);
+		return ret;
+	}
+	dp->fast_train_enable = !!(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
+	dev_dbg(dp->dev, "fast link training %s\n",
+		dp->fast_train_enable ? "supported" : "unsupported");
+	return 0;
+}
+
 static int analogix_dp_commit(struct analogix_dp_device *dp)
 {
 	int ret;
@@ -1038,8 +1040,16 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
 	if (ret)
 		return ret;
 
-	if (dp->psr_enable)
+	if (dp->psr_enable) {
 		ret = analogix_dp_enable_sink_psr(dp);
+		if (ret)
+			return ret;
+	}
+
+	/* Check whether panel supports fast training */
+	ret =  analogix_dp_fast_link_train_detection(dp);
+	if (ret)
+		dp->psr_enable = false;
 
 	return ret;
 }
-- 
2.17.0

  parent reply	other threads:[~2018-04-23 10:51 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20180423105022epcas3p442289343ea272f0722802b4746871fba@epcas3p4.samsung.com>
2018-04-23 10:49 ` [RESEND PATCH v6 00/27] DRM Rockchip rk3399 (Kevin) Enric Balletbo i Serra
2018-04-23 10:49   ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 01/27] drm/bridge: analogix_dp: Move enable video into config_video() Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 02/27] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 03/27] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 04/27] drm/bridge: analogix_dp: Retry bridge enable when it failed Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 05/27] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 06/27] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 07/27] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 08/27] drm/bridge: analogix_dp: Extend hpd check time to 100ms Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 09/27] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 10/27] drm/bridge: analogix_dp: Check dpcd write/read status Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-24 13:54     ` Jingoo Han
2018-04-24 13:54       ` Jingoo Han
2018-04-24 13:54       ` Jingoo Han
2018-04-23 10:49   ` [RESEND PATCH v6 11/27] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-24 13:57     ` Jingoo Han
2018-04-24 13:57       ` Jingoo Han
2018-04-24 13:57       ` Jingoo Han
2018-04-23 10:49   ` [RESEND PATCH v6 12/27] drm/bridge: analogix_dp: Reset aux channel if an error occurred Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 13/27] drm/rockchip: Restore psr->state when enable/disable psr failed Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-24 13:58     ` Jingoo Han
2018-04-24 13:58       ` Jingoo Han
2018-04-24 13:58       ` Jingoo Han
2018-04-23 10:49   ` [RESEND PATCH v6 14/27] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-24  1:25     ` Jingoo Han
2018-04-24  1:25       ` Jingoo Han
2018-04-24  1:25       ` Jingoo Han
2018-04-23 10:49   ` [RESEND PATCH v6 15/27] drm/bridge: analogix_dp: Fix timeout of video streamclk config Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 16/27] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-24  1:29     ` Jingoo Han
2018-04-24  1:29       ` Jingoo Han
2018-04-24  1:29       ` Jingoo Han
2018-04-23 10:49   ` Enric Balletbo i Serra [this message]
2018-04-23 10:49     ` [RESEND PATCH v6 17/27] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 18/27] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 19/27] drm/bridge: analogix_dp: Properly log AUX CH errors Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 20/27] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 21/27] drm/rockchip: pre dither down when output bpc is 8bit Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:49   ` [RESEND PATCH v6 22/27] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-24 14:02     ` Jingoo Han
2018-04-24 14:02       ` Jingoo Han
2018-04-24 14:02       ` Jingoo Han
2018-04-23 10:49   ` [RESEND PATCH v6 23/27] drm/rockchip: analogix_dp: Do not call Analogix code before bind Enric Balletbo i Serra
2018-04-23 10:49     ` Enric Balletbo i Serra
2018-04-23 10:50   ` [RESEND PATCH v6 24/27] drm/rockchip: psr: Avoid redundant calls to .set() callback Enric Balletbo i Serra
2018-04-23 10:50     ` Enric Balletbo i Serra
2018-04-23 10:50   ` [RESEND PATCH v6 25/27] drm/rockchip: psr: Sanitize semantics of allow/inhibit API Enric Balletbo i Serra
2018-04-23 10:50     ` Enric Balletbo i Serra
2018-04-23 10:50   ` [RESEND PATCH v6 26/27] drm/rockchip: Disallow PSR for the whole atomic commit Enric Balletbo i Serra
2018-04-23 10:50     ` Enric Balletbo i Serra
2018-04-23 10:50   ` [RESEND PATCH v6 27/27] drm/rockchip: psr: Remove flush by CRTC Enric Balletbo i Serra
2018-04-23 10:50     ` Enric Balletbo i Serra
2018-04-24  6:43   ` [RESEND PATCH v6 00/27] DRM Rockchip rk3399 (Kevin) Andrzej Hajda
2018-04-24  6:43     ` Andrzej Hajda
2018-04-24  6:43     ` Andrzej Hajda

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