All of lore.kernel.org
 help / color / mirror / Atom feed
From: Wu Hao <hao.wu@intel.com>
To: Alan Tull <atull@kernel.org>
Cc: Moritz Fischer <mdf@kernel.org>,
	linux-fpga@vger.kernel.org,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-api@vger.kernel.org, "Kang, Luwei" <luwei.kang@intel.com>,
	"Zhang, Yi Z" <yi.z.zhang@intel.com>,
	Tim Whisonant <tim.whisonant@intel.com>,
	Enno Luebbers <enno.luebbers@intel.com>,
	Shiva Rao <shiva.rao@intel.com>,
	Christopher Rauer <christopher.rauer@intel.com>
Subject: Re: [PATCH v5 20/28] fpga: dfl: add fpga bridge platform driver for FME
Date: Thu, 24 May 2018 07:42:13 +0800	[thread overview]
Message-ID: <20180523234213.GA24455@hao-dev> (raw)
In-Reply-To: <CANk1AXR-0=O2Ypyxn+wnyPmfdqG7Rmk_oK9et0YLkAkNHzbqLw@mail.gmail.com>

On Wed, May 23, 2018 at 04:06:17PM -0500, Alan Tull wrote:
> On Wed, May 23, 2018 at 10:28 AM, Wu Hao <hao.wu@intel.com> wrote:
> > On Wed, May 23, 2018 at 10:15:00AM -0500, Alan Tull wrote:
> >> On Tue, May 1, 2018 at 9:50 PM, Wu Hao <hao.wu@intel.com> wrote:
> >>
> >> Hi Hao,
> >>
> >> > This patch adds fpga bridge platform driver for FPGA Management Engine.
> >> > It implements the enable_set callback for fpga bridge.
> >> >
> >> > Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
> >> > Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
> >> > Signed-off-by: Shiva Rao <shiva.rao@intel.com>
> >> > Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
> >> > Signed-off-by: Wu Hao <hao.wu@intel.com>
> >> > Acked-by: Alan Tull <atull@kernel.org>
> >> > Acked-by: Moritz Fischer <mdf@kernel.org>
> >> > ---
> >> > v3: rename driver to fpga-dfl-fme-br
> >> >     remove useless dev_dbg in probe function.
> >> >     rebased due to fpga api change.
> >> > v4: rename to dfl-fme-br and fix SPDX license issue
> >> >     include dfl-fme-pr.h instead of dfl-fme.h
> >> >     add Acked-by from Alan and Moritz
> >> > v5: rebase due to API changes.
> >> >     defer port and its ops finding when really need.
> >> > ---
> >> >  drivers/fpga/Kconfig      |   6 +++
> >> >  drivers/fpga/Makefile     |   1 +
> >> >  drivers/fpga/dfl-fme-br.c | 114 ++++++++++++++++++++++++++++++++++++++++++++++
> >> >  3 files changed, 121 insertions(+)
> >> >  create mode 100644 drivers/fpga/dfl-fme-br.c
> >> >
> >> > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
> >> > index 89f76e8..a8f939a 100644
> >> > --- a/drivers/fpga/Kconfig
> >> > +++ b/drivers/fpga/Kconfig
> >> > @@ -156,6 +156,12 @@ config FPGA_DFL_FME_MGR
> >> >         help
> >> >           Say Y to enable FPGA Manager driver for FPGA Management Engine.
> >> >
> >> > +config FPGA_DFL_FME_BRIDGE
> >> > +       tristate "FPGA DFL FME Bridge Driver"
> >> > +       depends on FPGA_DFL_FME
> >> > +       help
> >> > +         Say Y to enable FPGA Bridge driver for FPGA Management Engine.
> >> > +
> >> >  config FPGA_DFL_PCI
> >> >         tristate "FPGA Device Feature List (DFL) PCIe Device Driver"
> >> >         depends on PCI && FPGA_DFL
> >> > diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
> >> > index f82814a..75096e9 100644
> >> > --- a/drivers/fpga/Makefile
> >> > +++ b/drivers/fpga/Makefile
> >> > @@ -32,6 +32,7 @@ obj-$(CONFIG_OF_FPGA_REGION)          += of-fpga-region.o
> >> >  obj-$(CONFIG_FPGA_DFL)                 += dfl.o
> >> >  obj-$(CONFIG_FPGA_DFL_FME)             += dfl-fme.o
> >> >  obj-$(CONFIG_FPGA_DFL_FME_MGR)         += dfl-fme-mgr.o
> >> > +obj-$(CONFIG_FPGA_DFL_FME_BRIDGE)      += dfl-fme-br.o
> >> >
> >> >  dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o
> >> >
> >> > diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl-fme-br.c
> >> > new file mode 100644
> >> > index 0000000..5c51b08
> >> > --- /dev/null
> >> > +++ b/drivers/fpga/dfl-fme-br.c
> >> > @@ -0,0 +1,114 @@
> >> > +// SPDX-License-Identifier: GPL-2.0
> >> > +/*
> >> > + * FPGA Bridge Driver for FPGA Management Engine (FME)
> >> > + *
> >> > + * Copyright (C) 2017 Intel Corporation, Inc.
> >> > + *
> >> > + * Authors:
> >> > + *   Wu Hao <hao.wu@intel.com>
> >> > + *   Joseph Grecco <joe.grecco@intel.com>
> >> > + *   Enno Luebbers <enno.luebbers@intel.com>
> >> > + *   Tim Whisonant <tim.whisonant@intel.com>
> >> > + *   Ananda Ravuri <ananda.ravuri@intel.com>
> >> > + *   Henry Mitchel <henry.mitchel@intel.com>
> >> > + */
> >> > +
> >> > +#include <linux/module.h>
> >> > +#include <linux/fpga/fpga-bridge.h>
> >> > +
> >> > +#include "dfl.h"
> >> > +#include "dfl-fme-pr.h"
> >> > +
> >> > +struct fme_br_priv {
> >> > +       struct dfl_fme_br_pdata *pdata;
> >> > +       struct dfl_fpga_port_ops *port_ops;
> >> > +       struct platform_device *port_pdev;
> >> > +};
> >> > +
> >> > +static int fme_bridge_enable_set(struct fpga_bridge *bridge, bool enable)
> >> > +{
> >> > +       struct fme_br_priv *priv = bridge->priv;
> >> > +       struct platform_device *port_pdev;
> >> > +       struct dfl_fpga_port_ops *ops;
> >> > +
> >> > +       if (!priv->port_pdev) {
> >> > +               port_pdev = dfl_fpga_cdev_find_port(priv->pdata->cdev,
> >> > +                                                   &priv->pdata->port_id,
> >> > +                                                   dfl_fpga_check_port_id);
> >> > +               if (!port_pdev)
> >> > +                       return -ENODEV;
> >> > +
> >> > +               priv->port_pdev = port_pdev;
> >> > +       }
> >> > +
> >> > +       if (priv->port_pdev && !priv->port_ops) {
> >> > +               ops = dfl_fpga_get_port_ops(priv->port_pdev);
> >> > +               if (!ops || !ops->enable_set)
> >> > +                       return -ENOENT;
> >> > +
> >> > +               priv->port_ops = ops;
> >> > +       }
> >>
> >> This is saving some pointers.  Is it possible that the port_pdev or
> >> port_ops could go away?
> >
> > Hi Alan
> >
> > Thanks for the comments.
> >
> > The find_port function will get the port device to prevent that.
> > You can see put device in remove function. And it's similar for the
> > port ops. In dfl_fpga_get_port_ops function, it will prevent unexpected
> > port ops removing by try module get.
> 
> OK, good, and I see the find_port function documents that put_device
> is needed, so that's good too.
> 
> When we previously discussed this [1] you described a procedure of
> hot-unplugging the VF AFU from the VM and turning it back to PF before
> doing the FPGA programming.   Some comments on that would be helpful,
> maybe located with the port_ops functions.
> 

Hi Alan

Actually I plan to add those descriptions about virtualization in the
documenation/fpga/dfl.txt, together with the patch which enables the
virtualization support for Intel FPGA device (e.g Intel PAC card). I
think dfl.txt is a better place to have that procedure documented.
How do you think?


> [1] https://lkml.org/lkml/2018/4/6/180
> 
> >
> >>
> >> Also, the port ops routines probably should be named
> >> dfl_fpga_port_ops_get/find_port/etc
> >>
> >
> > Hm.. as I see there are functions named as get_device(), put_device(), so
> > I just name it as ..._get_port_ops and ..._put_port_ops in similar way. :)
> > If you think that could be a better name, it's fine for me to change them.
> 
> Yes, I've seen that too.  I think keeping the prefix the same helps to
> organize the namespace.  Plus :) if I'm grepping through the code, I
> can be lazy and not have to use a regex to find the port ops
> functions.

so we good with current naming?

some places we find it's get_device() and put_device(), but other functions
like device_add(), device_del(). actually it's not a big problem I think, :)
currently port_ops has a unified style ..._add/del/get/put_port_ops. I am
fine with both kind of naming, if you prefer ...port_ops_add/del/get/put
style, please let me know, I can change them in the next version.

Thanks
Hao

> 
> Alan
> 
> >
> > Thanks
> > Hao
> >
> >> Alan
> >>
> >> > +
> >> > +       return priv->port_ops->enable_set(priv->port_pdev, enable);
> >> > +}
> >> > +
> >> > +static const struct fpga_bridge_ops fme_bridge_ops = {
> >> > +       .enable_set = fme_bridge_enable_set,
> >> > +};
> >> > +
> >> > +static int fme_br_probe(struct platform_device *pdev)
> >> > +{
> >> > +       struct device *dev = &pdev->dev;
> >> > +       struct fme_br_priv *priv;
> >> > +       struct fpga_bridge *br;
> >> > +       int ret;
> >> > +
> >> > +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> >> > +       if (!priv)
> >> > +               return -ENOMEM;
> >> > +
> >> > +       priv->pdata = dev_get_platdata(dev);
> >> > +
> >> > +       br = fpga_bridge_create(dev, "DFL FPGA FME Bridge",
> >> > +                               &fme_bridge_ops, priv);
> >> > +       if (!br)
> >> > +               return -ENOMEM;
> >> > +
> >> > +       platform_set_drvdata(pdev, br);
> >> > +
> >> > +       ret = fpga_bridge_register(br);
> >> > +       if (ret)
> >> > +               fpga_bridge_free(br);
> >> > +
> >> > +       return ret;
> >> > +}
> >> > +
> >> > +static int fme_br_remove(struct platform_device *pdev)
> >> > +{
> >> > +       struct fpga_bridge *br = platform_get_drvdata(pdev);
> >> > +       struct fme_br_priv *priv = br->priv;
> >> > +
> >> > +       fpga_bridge_unregister(br);
> >> > +
> >> > +       if (priv->port_pdev)
> >> > +               put_device(&priv->port_pdev->dev);
> >> > +       if (priv->port_ops)
> >> > +               dfl_fpga_put_port_ops(priv->port_ops);
> >> > +
> >> > +       return 0;
> >> > +}
> >> > +
> >> > +static struct platform_driver fme_br_driver = {
> >> > +       .driver = {
> >> > +               .name    = DFL_FPGA_FME_BRIDGE,
> >> > +       },
> >> > +       .probe   = fme_br_probe,
> >> > +       .remove  = fme_br_remove,
> >> > +};
> >> > +
> >> > +module_platform_driver(fme_br_driver);
> >> > +
> >> > +MODULE_DESCRIPTION("FPGA Bridge for DFL FPGA Management Engine");
> >> > +MODULE_AUTHOR("Intel Corporation");
> >> > +MODULE_LICENSE("GPL v2");
> >> > +MODULE_ALIAS("platform:dfl-fme-bridge");
> >> > --
> >> > 1.8.3.1
> >> >
> --
> To unsubscribe from this list: send the line "unsubscribe linux-fpga" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

  reply	other threads:[~2018-05-23 23:53 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-02  2:50 [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Wu Hao
2018-05-02  2:50 ` [PATCH v5 01/28] docs: fpga: add a document for FPGA Device Feature List (DFL) Framework Overview Wu Hao
2018-06-06 16:16   ` Alan Tull
2018-06-07  2:00     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 02/28] fpga: mgr: add region_id to fpga_image_info Wu Hao
2018-05-02  2:50 ` [PATCH v5 03/28] fpga: mgr: add status for fpga-manager Wu Hao
2018-05-02  2:50 ` [PATCH v5 04/28] fpga: mgr: add compat_id support Wu Hao
2018-05-07 21:09   ` Alan Tull
2018-05-21  3:03     ` Wu Hao
2018-05-21 17:33       ` Alan Tull
2018-05-22  9:39         ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 05/28] fpga: region: " Wu Hao
2018-05-07 21:09   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 06/28] fpga: add device feature list support Wu Hao
2018-06-05 20:21   ` Alan Tull
2018-06-06 12:22     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 07/28] fpga: dfl: add chardev support for feature devices Wu Hao
2018-06-05 20:21   ` Alan Tull
2018-06-06 12:24     ` Wu Hao
2018-06-07 18:03       ` Alan Tull
2018-06-08  0:11         ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 08/28] fpga: dfl: add dfl_fpga_cdev_find_port Wu Hao
2018-05-02  2:50 ` [PATCH v5 09/28] fpga: dfl: add feature device infrastructure Wu Hao
2018-06-05 21:14   ` Alan Tull
2018-06-06 12:33     ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 10/28] fpga: dfl: add dfl_fpga_port_ops support Wu Hao
2018-06-05 21:24   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 11/28] fpga: dfl: add dfl_fpga_check_port_id function Wu Hao
2018-06-05 21:25   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 12/28] fpga: add FPGA DFL PCIe device driver Wu Hao
2018-05-02  2:50 ` [PATCH v5 13/28] fpga: dfl-pci: add enumeration for feature devices Wu Hao
2018-05-02  2:50 ` [PATCH v5 14/28] fpga: dfl: add FPGA Management Engine driver basic framework Wu Hao
2018-06-06 16:08   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 15/28] fpga: dfl: fme: add header sub feature support Wu Hao
2018-05-02  2:50 ` [PATCH v5 16/28] fpga: dfl: fme: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02  2:50 ` [PATCH v5 17/28] fpga: dfl: fme: add partial reconfiguration sub feature support Wu Hao
2018-06-06 16:08   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 18/28] fpga: dfl: add fpga manager platform driver for FME Wu Hao
2018-06-06 15:52   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 19/28] fpga: dfl: fme-mgr: add compat_id support Wu Hao
2018-05-07 21:12   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 20/28] fpga: dfl: add fpga bridge platform driver for FME Wu Hao
2018-05-23 15:15   ` Alan Tull
2018-05-23 15:28     ` Wu Hao
2018-05-23 21:06       ` Alan Tull
2018-05-23 23:42         ` Wu Hao [this message]
2018-05-24 17:26           ` Alan Tull
2018-05-24 23:59             ` Wu Hao
2018-05-02  2:50 ` [PATCH v5 21/28] fpga: dfl: add fpga region " Wu Hao
2018-05-02  2:50 ` [PATCH v5 22/28] fpga: dfl: fme-region: add support for compat_id Wu Hao
2018-05-07 21:12   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 23/28] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2018-05-02  2:50 ` [PATCH v5 24/28] fpga: dfl: afu: add port ops support Wu Hao
2018-06-06 15:57   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 25/28] fpga: dfl: afu: add header sub feature support Wu Hao
2018-05-02  2:50 ` [PATCH v5 26/28] fpga: dfl: afu: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02  2:50 ` [PATCH v5 27/28] fpga: dfl: afu: add afu sub feature support Wu Hao
2018-06-06 16:04   ` Alan Tull
2018-05-02  2:50 ` [PATCH v5 28/28] fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2018-06-06 16:09   ` Alan Tull
2018-05-03 21:14 ` [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Alan Tull
2018-05-04  0:15   ` Wu Hao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180523234213.GA24455@hao-dev \
    --to=hao.wu@intel.com \
    --cc=atull@kernel.org \
    --cc=christopher.rauer@intel.com \
    --cc=enno.luebbers@intel.com \
    --cc=linux-api@vger.kernel.org \
    --cc=linux-fpga@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=luwei.kang@intel.com \
    --cc=mdf@kernel.org \
    --cc=shiva.rao@intel.com \
    --cc=tim.whisonant@intel.com \
    --cc=yi.z.zhang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.