From: Alan Tull <atull@kernel.org>
To: Wu Hao <hao.wu@intel.com>
Cc: Moritz Fischer <mdf@kernel.org>,
linux-fpga@vger.kernel.org,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-api@vger.kernel.org, "Kang, Luwei" <luwei.kang@intel.com>,
"Zhang, Yi Z" <yi.z.zhang@intel.com>,
"Liu, Song" <song.liu@intel.com>
Subject: Re: [PATCH v5 04/28] fpga: mgr: add compat_id support
Date: Mon, 21 May 2018 12:33:05 -0500 [thread overview]
Message-ID: <CANk1AXTDgVONiaECNOnwj26vCxJSi7ixvD_QcB4VmEo7P_cUMA@mail.gmail.com> (raw)
In-Reply-To: <20180521030307.GA26500@hao-dev>
On Sun, May 20, 2018 at 10:03 PM, Wu Hao <hao.wu@intel.com> wrote:
> On Mon, May 07, 2018 at 04:09:06PM -0500, Alan Tull wrote:
>> On Tue, May 1, 2018 at 9:50 PM, Wu Hao <hao.wu@intel.com> wrote:
>>
>> Hi Hao,
>>
>> Looks good!
>>
>> > This patch introduces compat_id support to fpga manager, it adds
>> > a fpga_compat_id pointer to fpga manager data structure to allow
>> > fpga manager drivers to save the compatibility id. This compat_id
>> > could be used for compatibility checking before doing partial
>> > reconfiguration to associated fpga regions.
>> >
>> > Signed-off-by: Wu Hao <hao.wu@intel.com>
>> Acked-by: Alan Tull <atull@kernel.org>
>
> Hi Alan
>
> Thanks a lot for the acked-by.
>
> Did you get a chance to look into other patches?
What I'm looking for mostly is: is it clear that this code was written
to be reused. What do you think? Was it? Is there a way that intent
could be made clear in the code? This patchset has a history of being
a one-off solution for a single platform, doing things to work around
the FPGA framework instead of doing what the framework was intended to
do. The FPGA framework was written so that any FPGA could be used
with interface. Currently in the upstream that means any of the
supported FPGAs can be programmed with the same of-fpga-region code.
It didn't have to get rewritten for each fpga.
This patchset adds 5000 lines and I understand that another 4000 is
coming to add to this. Has that been written so that the upper layer
can be reused? Or will the 'reusable' version be another huge
patchset? Do you see my point? Up to this point I've been trying to
help figure out what changes could make this reusable. If you could
get with someone to take responsibility for architecting this patchset
to be clearly reusable, that could speed things up.
If there are improvements to the current FPGA framework that can help
this work, I'm interested and open to suggestions/code in that
direction..
Alan
>
> Thanks
> Hao
next prev parent reply other threads:[~2018-05-21 17:33 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-02 2:50 [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Wu Hao
2018-05-02 2:50 ` [PATCH v5 01/28] docs: fpga: add a document for FPGA Device Feature List (DFL) Framework Overview Wu Hao
2018-06-06 16:16 ` Alan Tull
2018-06-07 2:00 ` Wu Hao
2018-05-02 2:50 ` [PATCH v5 02/28] fpga: mgr: add region_id to fpga_image_info Wu Hao
2018-05-02 2:50 ` [PATCH v5 03/28] fpga: mgr: add status for fpga-manager Wu Hao
2018-05-02 2:50 ` [PATCH v5 04/28] fpga: mgr: add compat_id support Wu Hao
2018-05-07 21:09 ` Alan Tull
2018-05-21 3:03 ` Wu Hao
2018-05-21 17:33 ` Alan Tull [this message]
2018-05-22 9:39 ` Wu Hao
2018-05-02 2:50 ` [PATCH v5 05/28] fpga: region: " Wu Hao
2018-05-07 21:09 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 06/28] fpga: add device feature list support Wu Hao
2018-06-05 20:21 ` Alan Tull
2018-06-06 12:22 ` Wu Hao
2018-05-02 2:50 ` [PATCH v5 07/28] fpga: dfl: add chardev support for feature devices Wu Hao
2018-06-05 20:21 ` Alan Tull
2018-06-06 12:24 ` Wu Hao
2018-06-07 18:03 ` Alan Tull
2018-06-08 0:11 ` Wu Hao
2018-05-02 2:50 ` [PATCH v5 08/28] fpga: dfl: add dfl_fpga_cdev_find_port Wu Hao
2018-05-02 2:50 ` [PATCH v5 09/28] fpga: dfl: add feature device infrastructure Wu Hao
2018-06-05 21:14 ` Alan Tull
2018-06-06 12:33 ` Wu Hao
2018-05-02 2:50 ` [PATCH v5 10/28] fpga: dfl: add dfl_fpga_port_ops support Wu Hao
2018-06-05 21:24 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 11/28] fpga: dfl: add dfl_fpga_check_port_id function Wu Hao
2018-06-05 21:25 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 12/28] fpga: add FPGA DFL PCIe device driver Wu Hao
2018-05-02 2:50 ` [PATCH v5 13/28] fpga: dfl-pci: add enumeration for feature devices Wu Hao
2018-05-02 2:50 ` [PATCH v5 14/28] fpga: dfl: add FPGA Management Engine driver basic framework Wu Hao
2018-06-06 16:08 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 15/28] fpga: dfl: fme: add header sub feature support Wu Hao
2018-05-02 2:50 ` [PATCH v5 16/28] fpga: dfl: fme: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02 2:50 ` [PATCH v5 17/28] fpga: dfl: fme: add partial reconfiguration sub feature support Wu Hao
2018-06-06 16:08 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 18/28] fpga: dfl: add fpga manager platform driver for FME Wu Hao
2018-06-06 15:52 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 19/28] fpga: dfl: fme-mgr: add compat_id support Wu Hao
2018-05-07 21:12 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 20/28] fpga: dfl: add fpga bridge platform driver for FME Wu Hao
2018-05-23 15:15 ` Alan Tull
2018-05-23 15:28 ` Wu Hao
2018-05-23 21:06 ` Alan Tull
2018-05-23 23:42 ` Wu Hao
2018-05-24 17:26 ` Alan Tull
2018-05-24 23:59 ` Wu Hao
2018-05-02 2:50 ` [PATCH v5 21/28] fpga: dfl: add fpga region " Wu Hao
2018-05-02 2:50 ` [PATCH v5 22/28] fpga: dfl: fme-region: add support for compat_id Wu Hao
2018-05-07 21:12 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 23/28] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2018-05-02 2:50 ` [PATCH v5 24/28] fpga: dfl: afu: add port ops support Wu Hao
2018-06-06 15:57 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 25/28] fpga: dfl: afu: add header sub feature support Wu Hao
2018-05-02 2:50 ` [PATCH v5 26/28] fpga: dfl: afu: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2018-05-02 2:50 ` [PATCH v5 27/28] fpga: dfl: afu: add afu sub feature support Wu Hao
2018-06-06 16:04 ` Alan Tull
2018-05-02 2:50 ` [PATCH v5 28/28] fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2018-06-06 16:09 ` Alan Tull
2018-05-03 21:14 ` [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers Alan Tull
2018-05-04 0:15 ` Wu Hao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CANk1AXTDgVONiaECNOnwj26vCxJSi7ixvD_QcB4VmEo7P_cUMA@mail.gmail.com \
--to=atull@kernel.org \
--cc=hao.wu@intel.com \
--cc=linux-api@vger.kernel.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luwei.kang@intel.com \
--cc=mdf@kernel.org \
--cc=song.liu@intel.com \
--cc=yi.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.