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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: agraf@suse.de, aik@ozlabs.ru, groug@kaod.org, clg@kaod.org,
	lvivier@redhat.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH 03/23] spapr_cpu_core: migrate per-CPU data
Date: Fri, 22 Jun 2018 14:24:17 +1000	[thread overview]
Message-ID: <20180622042437.14259-3-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20180622042437.14259-1-david@gibson.dropbear.id.au>

From: Greg Kurz <groug@kaod.org>

A per-CPU machine data pointer was recently added to PowerPCCPU. The
motivation is to to hide platform specific details from the core CPU
code. This per-CPU data can hold state which is relevant to the guest
though, eg, Virtual Processor Areas, and we should migrate this state.

This patch adds the plumbing so that we can migrate the per-CPU data
for PAPR guests. We only do this for newer machine types for the sake
of backward compatibility. No state is migrated for the moment: the
vmstate_spapr_cpu_state structure will be populated by subsequent
patches.

Signed-off-by: Greg Kurz <groug@kaod.org>
[dwg: Fix some trivial spelling and spacing errors]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/ppc/spapr.c                  |  7 ++++++-
 hw/ppc/spapr_cpu_core.c         | 22 ++++++++++++++++++++--
 include/hw/ppc/spapr_cpu_core.h |  1 +
 3 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index db0fb385d4..3174468fc5 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -4115,7 +4115,12 @@ DEFINE_SPAPR_MACHINE(3_0, "3.0", true);
     HW_COMPAT_2_12                                                     \
     {                                                                  \
         .driver = TYPE_POWERPC_CPU,                                    \
-        .property = "pre-3.0-migration",                              \
+        .property = "pre-3.0-migration",                               \
+        .value    = "on",                                              \
+    },                                                                 \
+    {                                                                  \
+        .driver = TYPE_SPAPR_CPU_CORE,                                 \
+        .property = "pre-3.0-migration",                               \
         .value    = "on",                                              \
     },
 
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index aef3be33a3..f129ac884e 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -129,6 +129,15 @@ static void spapr_cpu_core_unrealize(DeviceState *dev, Error **errp)
     g_free(sc->threads);
 }
 
+static const VMStateDescription vmstate_spapr_cpu_state = {
+    .name = "spapr_cpu",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .fields = (VMStateField[]) {
+        VMSTATE_END_OF_LIST()
+    },
+};
+
 static void spapr_realize_vcpu(PowerPCCPU *cpu, sPAPRMachineState *spapr,
                                Error **errp)
 {
@@ -194,6 +203,10 @@ static PowerPCCPU *spapr_create_vcpu(sPAPRCPUCore *sc, int i, Error **errp)
     }
 
     cpu->machine_data = g_new0(sPAPRCPUState, 1);
+    if (!sc->pre_3_0_migration) {
+        vmstate_register(NULL, cs->cpu_index, &vmstate_spapr_cpu_state,
+                         cpu->machine_data);
+    }
 
     object_unref(obj);
     return cpu;
@@ -204,10 +217,13 @@ err:
     return NULL;
 }
 
-static void spapr_delete_vcpu(PowerPCCPU *cpu)
+static void spapr_delete_vcpu(PowerPCCPU *cpu, sPAPRCPUCore *sc)
 {
     sPAPRCPUState *spapr_cpu = spapr_cpu_state(cpu);
 
+    if (!sc->pre_3_0_migration) {
+        vmstate_unregister(NULL, &vmstate_spapr_cpu_state, cpu->machine_data);
+    }
     cpu->machine_data = NULL;
     g_free(spapr_cpu);
     object_unparent(OBJECT(cpu));
@@ -253,7 +269,7 @@ err_unrealize:
     }
 err:
     while (--i >= 0) {
-        spapr_delete_vcpu(sc->threads[i]);
+        spapr_delete_vcpu(sc->threads[i], sc);
     }
     g_free(sc->threads);
     error_propagate(errp, local_err);
@@ -261,6 +277,8 @@ err:
 
 static Property spapr_cpu_core_properties[] = {
     DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
+    DEFINE_PROP_BOOL("pre-3.0-migration", sPAPRCPUCore, pre_3_0_migration,
+                     false),
     DEFINE_PROP_END_OF_LIST()
 };
 
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 8ceea2973a..9e2821e4b3 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -31,6 +31,7 @@ typedef struct sPAPRCPUCore {
     /*< public >*/
     PowerPCCPU **threads;
     int node_id;
+    bool pre_3_0_migration; /* older machine don't know about sPAPRCPUState */
 } sPAPRCPUCore;
 
 typedef struct sPAPRCPUCoreClass {
-- 
2.17.1

  parent reply	other threads:[~2018-06-22  4:24 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-22  4:24 [Qemu-devel] [PATCH 01/23] ppc/pnv: introduce a new intc_create() operation to the chip model David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 02/23] ppc/pnv: introduce a new isa_create() " David Gibson
2018-06-22  4:24 ` David Gibson [this message]
2018-06-22  4:24 ` [Qemu-devel] [PATCH 04/23] spapr_cpu_core: migrate VPA related state David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 05/23] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 06/23] ppc/pnv: consolidate the creation of the ISA bus device tree David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 07/23] target/ppc: Allow cpu compatiblity checks based on type, not instance David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 08/23] spapr: Compute effective capability values earlier David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 09/23] spapr: Add cpu_apply hook to capabilities David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 10/23] target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 11/23] spapr: split the IRQ allocation sequence David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 12/23] spapr: remove unused spapr_irq routines David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 13/23] fpu_helper.c: fix helper_fpscr_clrbit() function David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 14/23] sm501: Fix hardware cursor color conversion David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 15/23] ppc4xx_i2c: Remove unimplemented sdata and intr registers David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 16/23] ppc4xx_i2c: Implement directcntl register David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 17/23] target/ppc: Add missing opcode for icbt on PPC440 David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 18/23] pseries: Update SLOF firmware image to qemu-slof-20180621 David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 19/23] spapr: Maximum (HPT) pagesize property David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 20/23] spapr: Use maximum page size capability to simplify memory backend checking David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 21/23] target/ppc: Add ppc_hash64_filter_pagesizes() David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 22/23] spapr: Limit available pagesizes to provide a consistent guest environment David Gibson
2018-06-22  4:24 ` [Qemu-devel] [PATCH 23/23] spapr: Don't rewrite mmu capabilities in KVM mode David Gibson
2018-06-22  9:44 ` [Qemu-devel] [PATCH 01/23] ppc/pnv: introduce a new intc_create() operation to the chip model Greg Kurz
2018-06-22 10:32   ` David Gibson
2018-06-26  9:07 ` Peter Maydell
2018-06-26  9:31   ` Cédric Le Goater

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