From: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
To: abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
chandanu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
ryadav-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
skolluku-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
airlied-cv59FeDIM0c@public.gmane.org,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
nganji-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
hoegsberg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
dovizu-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: Sibi Sankar <sibis-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>
Subject: [PATCH v3 11/19] drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor
Date: Fri, 20 Jul 2018 16:43:02 -0400 [thread overview]
Message-ID: <20180720204315.19054-12-seanpaul@chromium.org> (raw)
In-Reply-To: <20180720204315.19054-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
From: Abhinav Kumar <abhinavk@codeaurora.org>
Make the pclk_rate u64 to accommodate higher pixel clock
rates.
Changes in v3:
- Converted pclk_rate to u32 (Archit)
- Rebase on dsi cleanup set in msm-next
Cc: Sibi Sankar <sibis@codeaurora.org>
Cc: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index f6c6eddbcec7..dff8e88efb66 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -702,6 +702,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi)
u8 lanes = msm_host->lanes;
u32 bpp = dsi_get_bpp(msm_host->format);
u32 pclk_rate;
+ u64 pclk_bpp;
unsigned int esc_mhz, esc_div;
unsigned long byte_mhz;
@@ -716,13 +717,15 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi)
if (is_dual_dsi)
pclk_rate /= 2;
+ pclk_bpp = pclk_rate * bpp;
if (lanes > 0) {
- msm_host->byte_clk_rate = (pclk_rate * bpp) / (8 * lanes);
+ do_div(pclk_bpp, (8 * lanes));
} else {
pr_err("%s: forcing mdss_dsi lanes to 1\n", __func__);
- msm_host->byte_clk_rate = (pclk_rate * bpp) / 8;
+ do_div(pclk_bpp, 8);
}
msm_host->pixel_clk_rate = pclk_rate;
+ msm_host->byte_clk_rate = pclk_bpp;
DBG("pclk=%d, bclk=%d", msm_host->pixel_clk_rate,
msm_host->byte_clk_rate);
--
Sean Paul, Software Engineer, Google / Chromium OS
_______________________________________________
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Freedreno@lists.freedesktop.org
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next prev parent reply other threads:[~2018-07-20 20:43 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-20 20:42 [PATCH v3 00/19] drm/msm: Add support for SDM845 Display Processing Unit (DPU) Sean Paul
2018-07-20 20:42 ` [PATCH v3 03/19] drm: add msm compressed format modifiers Sean Paul
[not found] ` <20180720204315.19054-4-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2018-07-25 14:09 ` Stanimir Varbanov
2018-07-25 23:09 ` Jeykumar Sankaran
2018-07-26 9:37 ` Stanimir Varbanov
[not found] ` <d224e3ff142d687c07233f70864206af-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-07-26 11:45 ` Rob Clark
[not found] ` <CAF6AEGvrpmNVtYJxMR2Ka5S3_oeGm8C_SbeOPZR_TAONhS0_KA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-26 14:43 ` [PATCH v4 " Sean Paul
2018-07-20 20:42 ` [PATCH v3 04/19] drm/msm/dsi: adjust dsi timing for dual dsi mode Sean Paul
2018-07-20 20:42 ` [PATCH v3 06/19] drm/msm/dsi: initialize postdiv_lock before use for 10nm pll Sean Paul
2018-07-20 20:43 ` [PATCH v3 09/19] drm/msm/mdp5: subclass msm_mdss for mdp5 Sean Paul
2018-07-20 20:43 ` [PATCH v3 12/19] drm/msm: Clean up dangling atomic_wq Sean Paul
[not found] ` <20180720204315.19054-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2018-07-20 20:42 ` [PATCH v3 01/19] dt-bindings: msm/dsi: Add mdp transfer time to msm dsi binding Sean Paul
2018-07-20 20:42 ` [PATCH v3 02/19] drm: Add support for pps and compression mode command packet Sean Paul
2018-07-20 20:42 ` Sean Paul
2018-07-20 20:42 ` Sean Paul
2018-07-20 20:42 ` [PATCH v3 05/19] drm/msm/dsi: Use one connector for dual DSI mode Sean Paul
2018-07-20 20:42 ` [PATCH v3 07/19] drm/msm/dsi: set encoder mode for DRM bridge explicitly Sean Paul
2018-07-20 20:42 ` [PATCH v3 08/19] drm/msm: Move wait_for_vblanks into mdp complete_commit() hooks Sean Paul
2018-07-20 20:43 ` [PATCH v3 10/19] drm/msm: enable zpos normalization Sean Paul
2018-07-20 20:43 ` Sean Paul [this message]
2018-07-20 20:43 ` [PATCH v3 13/19] drm/msm: #define MDP version numbers Sean Paul
2018-07-20 20:43 ` [PATCH v3 14/19] drm/msm: Use labels for unwinding in the error path Sean Paul
2018-07-20 20:43 ` [PATCH v3 15/19] drm/msm: #define MAX_<OBJECT> in msm_drv.h Sean Paul
2018-07-20 20:43 ` [PATCH v3 16/19] drm/msm: Add .commit() callback to msm_kms functions Sean Paul
2018-07-20 20:43 ` [PATCH v3 17/19] drm/msm: Add pm_suspend/resume callbacks to msm_kms Sean Paul
2018-07-20 20:43 ` [PATCH v3 18/19] dt-bindings: msm/disp: Add bindings for Snapdragon 845 DPU Sean Paul
2018-07-24 23:31 ` Rob Herring
2018-07-20 20:43 ` [PATCH v3 19/19] drm/msm: Add SDM845 DPU support Sean Paul
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