All of lore.kernel.org
 help / color / mirror / Atom feed
From: Nicholas Piggin <npiggin@gmail.com>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-kernel@vger.kernel.org, peterz@infradead.org,
	benh@au1.ibm.com, torvalds@linux-foundation.org,
	catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH 08/11] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather
Date: Mon, 27 Aug 2018 14:44:57 +1000	[thread overview]
Message-ID: <20180827144457.3f4036e3@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <1535125966-7666-9-git-send-email-will.deacon@arm.com>

On Fri, 24 Aug 2018 16:52:43 +0100
Will Deacon <will.deacon@arm.com> wrote:

> From: Peter Zijlstra <peterz@infradead.org>
> 
> Some architectures require different TLB invalidation instructions
> depending on whether it is only the last-level of page table being
> changed, or whether there are also changes to the intermediate
> (directory) entries higher up the tree.
> 
> Add a new bit to the flags bitfield in struct mmu_gather so that the
> architecture code can operate accordingly if it's the intermediate
> levels being invalidated.
> 
> Signed-off-by: Peter Zijlstra <peterz@infradead.org>
> Signed-off-by: Will Deacon <will.deacon@arm.com>

powerpc should be able to move right over to using this rather
than keeping the bit in need_flush_all.

powerpc may be able to use the unmap granule thing to improve
its page size dependent flushes, but it might prefer to go
a different way and track start-end for different page sizes.
I wonder how much of that stuff should go into generic code,
and whether it should instead go into a struct arch_mmu_gather.

Thanks,
Nick

WARNING: multiple messages have this Message-ID (diff)
From: npiggin@gmail.com (Nicholas Piggin)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 08/11] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather
Date: Mon, 27 Aug 2018 14:44:57 +1000	[thread overview]
Message-ID: <20180827144457.3f4036e3@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <1535125966-7666-9-git-send-email-will.deacon@arm.com>

On Fri, 24 Aug 2018 16:52:43 +0100
Will Deacon <will.deacon@arm.com> wrote:

> From: Peter Zijlstra <peterz@infradead.org>
> 
> Some architectures require different TLB invalidation instructions
> depending on whether it is only the last-level of page table being
> changed, or whether there are also changes to the intermediate
> (directory) entries higher up the tree.
> 
> Add a new bit to the flags bitfield in struct mmu_gather so that the
> architecture code can operate accordingly if it's the intermediate
> levels being invalidated.
> 
> Signed-off-by: Peter Zijlstra <peterz@infradead.org>
> Signed-off-by: Will Deacon <will.deacon@arm.com>

powerpc should be able to move right over to using this rather
than keeping the bit in need_flush_all.

powerpc may be able to use the unmap granule thing to improve
its page size dependent flushes, but it might prefer to go
a different way and track start-end for different page sizes.
I wonder how much of that stuff should go into generic code,
and whether it should instead go into a struct arch_mmu_gather.

Thanks,
Nick

  reply	other threads:[~2018-08-27  4:45 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-24 15:52 [RFC PATCH 00/11] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Will Deacon
2018-08-24 15:52 ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 01/11] arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range() Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 02/11] arm64: tlb: Add DSB ISHST prior to TLBI in __flush_tlb_[kernel_]pgtable() Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 17:56   ` Peter Zijlstra
2018-08-24 17:56     ` Peter Zijlstra
2018-08-28 13:03     ` Will Deacon
2018-08-28 13:03       ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 03/11] arm64: pgtable: Implement p[mu]d_valid() and check in set_p[mu]d() Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 16:15   ` Linus Torvalds
2018-08-24 16:15     ` Linus Torvalds
2018-08-28 12:49     ` Will Deacon
2018-08-28 12:49       ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 04/11] arm64: tlb: Justify non-leaf invalidation in flush_tlb_range() Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 05/11] arm64: tlbflush: Allow stride to be specified for __flush_tlb_range() Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 06/11] arm64: tlb: Remove redundant !CONFIG_HAVE_RCU_TABLE_FREE code Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 07/11] asm-generic/tlb: Guard with #ifdef CONFIG_MMU Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 08/11] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-27  4:44   ` Nicholas Piggin [this message]
2018-08-27  4:44     ` Nicholas Piggin
2018-08-28 13:46     ` Peter Zijlstra
2018-08-28 13:46       ` Peter Zijlstra
2018-08-28 13:48       ` Peter Zijlstra
2018-08-28 13:48         ` Peter Zijlstra
2018-08-28 14:12       ` Nicholas Piggin
2018-08-28 14:12         ` Nicholas Piggin
2018-08-24 15:52 ` [RFC PATCH 09/11] asm-generic/tlb: Track which levels of the page tables have been cleared Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-27  7:53   ` Peter Zijlstra
2018-08-27  7:53     ` Peter Zijlstra
2018-08-28 13:12     ` Will Deacon
2018-08-28 13:12       ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 10/11] arm64: tlb: Adjust stride and type of TLBI according to mmu_gather Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 15:52 ` [RFC PATCH 11/11] arm64: tlb: Avoid synchronous TLBIs when freeing page tables Will Deacon
2018-08-24 15:52   ` Will Deacon
2018-08-24 16:20 ` [RFC PATCH 00/11] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Linus Torvalds
2018-08-24 16:20   ` Linus Torvalds
2018-08-26 10:56   ` Peter Zijlstra
2018-08-26 10:56     ` Peter Zijlstra
2018-09-04 18:38 ` Jon Masters
2018-09-04 18:38   ` Jon Masters
2018-09-05 12:28   ` Will Deacon
2018-09-05 12:28     ` Will Deacon
2018-09-07  6:36     ` Jon Masters
2018-09-07  6:36       ` Jon Masters
2018-09-13 15:53       ` Will Deacon
2018-09-13 15:53         ` Will Deacon
2018-09-13 16:53         ` Jon Masters
2018-09-13 16:53           ` Jon Masters

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180827144457.3f4036e3@roar.ozlabs.ibm.com \
    --to=npiggin@gmail.com \
    --cc=benh@au1.ibm.com \
    --cc=catalin.marinas@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=peterz@infradead.org \
    --cc=torvalds@linux-foundation.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.