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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Jingoo Han <jingoohan1@gmail.com>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	<Gustavo.Pimentel@synopsys.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>,
	<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: [RFC PATCH 40/40] arm64: dts: k3-am6: Add Root Complex PCIe dt node
Date: Fri, 21 Sep 2018 15:51:55 +0530	[thread overview]
Message-ID: <20180921102155.22839-41-kishon@ti.com> (raw)
In-Reply-To: <20180921102155.22839-1-kishon@ti.com>

Add Root Complex PCIe dt node.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 83 ++++++++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am65.dtsi      |  1 +
 2 files changed, 84 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index b08d15fa110e..0a5d74a8eef4 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -14,6 +14,21 @@
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x00100000 0x1c000>;
 
+		pcie0_mode: pcie-mode@4060 {
+			compatible = "syscon";
+			reg = <0x00004060 0x4>;
+		};
+
+		pcie1_mode: pcie-mode@4070 {
+			compatible = "syscon";
+			reg = <0x00004070 0x4>;
+		};
+
+		pcie_devid: pcie-devid@210 {
+			compatible = "syscon";
+			reg = <0x00000210 0x4>;
+		};
+
 		serdes0_clk: serdes_clk@4080 {
 			compatible = "syscon";
 			reg = <0x00004080 0x4>;
@@ -128,4 +143,72 @@
 		clock-frequency = <48000000>;
 		current-speed = <115200>;
 	};
+
+	pcie0_rc: pcie@5500000 {
+		compatible = "ti,am654-pcie-rc";
+		reg =  <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
+		reg-names = "app", "dbics", "config", "atu";
+		power-domains = <&k3_pds 120>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x81000000 0 0          0x0 0x10020000 0 0x00010000
+			  0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
+		ti,syscon-pcie-id = <&pcie_devid>;
+		ti,syscon-pcie-mode = <&pcie0_mode>;
+		bus-range = <0x0 0xff>;
+		device_type = "pci";
+		num-lanes = <1>;
+		num-ob-windows = <16>;
+		num-viewport = <16>;
+		interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie0_intc 0>, /* INT A */
+				<0 0 0 2 &pcie0_intc 0>, /* INT B */
+				<0 0 0 3 &pcie0_intc 0>, /* INT C */
+				<0 0 0 4 &pcie0_intc 0>; /* INT D */
+		msi-map = <0x0 &gic_its 0x0 0x10000>;
+		status = "disabled";
+
+		pcie0_intc: legacy-interrupt-controller@1 {
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	pcie1_rc: pcie@5600000 {
+		compatible = "ti,am654-pcie-rc";
+		reg =  <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
+		reg-names = "app", "dbics", "config", "atu";
+		power-domains = <&k3_pds 121>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x81000000 0 0          0x0   0x18020000 0 0x00010000
+			  0x82000000 0 0x18030000 0x0   0x18030000 0 0x07FD0000>;
+		ti,syscon-pcie-id = <&pcie_devid>;
+		ti,syscon-pcie-mode = <&pcie1_mode>;
+		bus-range = <0x0 0xff>;
+		status = "disabled";
+		device_type = "pci";
+		num-lanes = <1>;
+		num-ob-windows = <16>;
+		num-viewport = <16>;
+		interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie1_intc 0>, /* INT A */
+				<0 0 0 2 &pcie1_intc 0>, /* INT B */
+				<0 0 0 3 &pcie1_intc 0>, /* INT C */
+				<0 0 0 4 &pcie1_intc 0>; /* INT D */
+		msi-map = <0x0 &gic_its 0x10000 0x10000>;
+
+		pcie1_intc: legacy-interrupt-controller@1 {
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 343 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi
index 3d4bf369d030..b87081765894 100644
--- a/arch/arm64/boot/dts/ti/k3-am65.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi
@@ -61,6 +61,7 @@
 			 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
 			 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
 			 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
+			 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
 			 /* MCUSS Range */
 			 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
 			 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Jingoo Han <jingoohan1@gmail.com>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Gustavo.Pimentel@synopsys.com
Cc: Mark Rutland <mark.rutland@arm.com>,
	Santosh Shilimkar <ssantosh@kernel.org>,
	Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 40/40] arm64: dts: k3-am6: Add Root Complex PCIe dt node
Date: Fri, 21 Sep 2018 15:51:55 +0530	[thread overview]
Message-ID: <20180921102155.22839-41-kishon@ti.com> (raw)
In-Reply-To: <20180921102155.22839-1-kishon@ti.com>

Add Root Complex PCIe dt node.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 83 ++++++++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am65.dtsi      |  1 +
 2 files changed, 84 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index b08d15fa110e..0a5d74a8eef4 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -14,6 +14,21 @@
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x00100000 0x1c000>;
 
+		pcie0_mode: pcie-mode@4060 {
+			compatible = "syscon";
+			reg = <0x00004060 0x4>;
+		};
+
+		pcie1_mode: pcie-mode@4070 {
+			compatible = "syscon";
+			reg = <0x00004070 0x4>;
+		};
+
+		pcie_devid: pcie-devid@210 {
+			compatible = "syscon";
+			reg = <0x00000210 0x4>;
+		};
+
 		serdes0_clk: serdes_clk@4080 {
 			compatible = "syscon";
 			reg = <0x00004080 0x4>;
@@ -128,4 +143,72 @@
 		clock-frequency = <48000000>;
 		current-speed = <115200>;
 	};
+
+	pcie0_rc: pcie@5500000 {
+		compatible = "ti,am654-pcie-rc";
+		reg =  <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
+		reg-names = "app", "dbics", "config", "atu";
+		power-domains = <&k3_pds 120>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x81000000 0 0          0x0 0x10020000 0 0x00010000
+			  0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
+		ti,syscon-pcie-id = <&pcie_devid>;
+		ti,syscon-pcie-mode = <&pcie0_mode>;
+		bus-range = <0x0 0xff>;
+		device_type = "pci";
+		num-lanes = <1>;
+		num-ob-windows = <16>;
+		num-viewport = <16>;
+		interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie0_intc 0>, /* INT A */
+				<0 0 0 2 &pcie0_intc 0>, /* INT B */
+				<0 0 0 3 &pcie0_intc 0>, /* INT C */
+				<0 0 0 4 &pcie0_intc 0>; /* INT D */
+		msi-map = <0x0 &gic_its 0x0 0x10000>;
+		status = "disabled";
+
+		pcie0_intc: legacy-interrupt-controller@1 {
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	pcie1_rc: pcie@5600000 {
+		compatible = "ti,am654-pcie-rc";
+		reg =  <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
+		reg-names = "app", "dbics", "config", "atu";
+		power-domains = <&k3_pds 121>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x81000000 0 0          0x0   0x18020000 0 0x00010000
+			  0x82000000 0 0x18030000 0x0   0x18030000 0 0x07FD0000>;
+		ti,syscon-pcie-id = <&pcie_devid>;
+		ti,syscon-pcie-mode = <&pcie1_mode>;
+		bus-range = <0x0 0xff>;
+		status = "disabled";
+		device_type = "pci";
+		num-lanes = <1>;
+		num-ob-windows = <16>;
+		num-viewport = <16>;
+		interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie1_intc 0>, /* INT A */
+				<0 0 0 2 &pcie1_intc 0>, /* INT B */
+				<0 0 0 3 &pcie1_intc 0>, /* INT C */
+				<0 0 0 4 &pcie1_intc 0>; /* INT D */
+		msi-map = <0x0 &gic_its 0x10000 0x10000>;
+
+		pcie1_intc: legacy-interrupt-controller@1 {
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 343 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi
index 3d4bf369d030..b87081765894 100644
--- a/arch/arm64/boot/dts/ti/k3-am65.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi
@@ -61,6 +61,7 @@
 			 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
 			 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
 			 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
+			 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
 			 /* MCUSS Range */
 			 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
 			 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
-- 
2.17.1

WARNING: multiple messages have this Message-ID (diff)
From: kishon@ti.com (Kishon Vijay Abraham I)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 40/40] arm64: dts: k3-am6: Add Root Complex PCIe dt node
Date: Fri, 21 Sep 2018 15:51:55 +0530	[thread overview]
Message-ID: <20180921102155.22839-41-kishon@ti.com> (raw)
In-Reply-To: <20180921102155.22839-1-kishon@ti.com>

Add Root Complex PCIe dt node.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 83 ++++++++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am65.dtsi      |  1 +
 2 files changed, 84 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index b08d15fa110e..0a5d74a8eef4 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -14,6 +14,21 @@
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x00100000 0x1c000>;
 
+		pcie0_mode: pcie-mode at 4060 {
+			compatible = "syscon";
+			reg = <0x00004060 0x4>;
+		};
+
+		pcie1_mode: pcie-mode at 4070 {
+			compatible = "syscon";
+			reg = <0x00004070 0x4>;
+		};
+
+		pcie_devid: pcie-devid at 210 {
+			compatible = "syscon";
+			reg = <0x00000210 0x4>;
+		};
+
 		serdes0_clk: serdes_clk at 4080 {
 			compatible = "syscon";
 			reg = <0x00004080 0x4>;
@@ -128,4 +143,72 @@
 		clock-frequency = <48000000>;
 		current-speed = <115200>;
 	};
+
+	pcie0_rc: pcie at 5500000 {
+		compatible = "ti,am654-pcie-rc";
+		reg =  <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
+		reg-names = "app", "dbics", "config", "atu";
+		power-domains = <&k3_pds 120>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x81000000 0 0          0x0 0x10020000 0 0x00010000
+			  0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
+		ti,syscon-pcie-id = <&pcie_devid>;
+		ti,syscon-pcie-mode = <&pcie0_mode>;
+		bus-range = <0x0 0xff>;
+		device_type = "pci";
+		num-lanes = <1>;
+		num-ob-windows = <16>;
+		num-viewport = <16>;
+		interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie0_intc 0>, /* INT A */
+				<0 0 0 2 &pcie0_intc 0>, /* INT B */
+				<0 0 0 3 &pcie0_intc 0>, /* INT C */
+				<0 0 0 4 &pcie0_intc 0>; /* INT D */
+		msi-map = <0x0 &gic_its 0x0 0x10000>;
+		status = "disabled";
+
+		pcie0_intc: legacy-interrupt-controller at 1 {
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	pcie1_rc: pcie at 5600000 {
+		compatible = "ti,am654-pcie-rc";
+		reg =  <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
+		reg-names = "app", "dbics", "config", "atu";
+		power-domains = <&k3_pds 121>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges = <0x81000000 0 0          0x0   0x18020000 0 0x00010000
+			  0x82000000 0 0x18030000 0x0   0x18030000 0 0x07FD0000>;
+		ti,syscon-pcie-id = <&pcie_devid>;
+		ti,syscon-pcie-mode = <&pcie1_mode>;
+		bus-range = <0x0 0xff>;
+		status = "disabled";
+		device_type = "pci";
+		num-lanes = <1>;
+		num-ob-windows = <16>;
+		num-viewport = <16>;
+		interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie1_intc 0>, /* INT A */
+				<0 0 0 2 &pcie1_intc 0>, /* INT B */
+				<0 0 0 3 &pcie1_intc 0>, /* INT C */
+				<0 0 0 4 &pcie1_intc 0>; /* INT D */
+		msi-map = <0x0 &gic_its 0x10000 0x10000>;
+
+		pcie1_intc: legacy-interrupt-controller at 1 {
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 343 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi
index 3d4bf369d030..b87081765894 100644
--- a/arch/arm64/boot/dts/ti/k3-am65.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi
@@ -61,6 +61,7 @@
 			 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
 			 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
 			 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
+			 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
 			 /* MCUSS Range */
 			 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
 			 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
-- 
2.17.1

  parent reply	other threads:[~2018-09-21 10:27 UTC|newest]

Thread overview: 141+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-21 10:21 [RFC PATCH 00/40] Cleanup pci-keystone.c and Add AM654 PCIe Support Kishon Vijay Abraham I
2018-09-21 10:21 ` Kishon Vijay Abraham I
2018-09-21 10:21 ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 01/40] PCI: keystone: Use quirk to limit MRRS for K2G Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 02/40] PCI: keystone: Use quirk to set MRRS for PCI host bridge Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 03/40] PCI: keystone: Move dw_pcie_setup_rc out of ks_pcie_establish_link() Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 04/40] PCI: keystone: Do not initiate link training multiple times Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 05/40] PCI: keystone: Remove unused argument from ks_dw_pcie_host_init() Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 06/40] PCI: keystone: Add start_link/stop_link dw_pcie_ops Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 07/40] PCI: keystone: Merge pci-keystone-dw.c and pci-keystone.c Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 08/40] PCI: keystone: Cleanup MSI/legacy interrupt configuration and handling Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2021-07-03 21:01   ` Krzysztof Wilczyński
2021-07-03 21:01     ` Krzysztof Wilczyński
2021-07-05  8:21     ` Kishon Vijay Abraham I
2021-07-05  8:21       ` Kishon Vijay Abraham I
2021-07-06 20:34       ` Krzysztof Wilczyński
2021-07-06 20:34         ` Krzysztof Wilczyński
2018-09-21 10:21 ` [RFC PATCH 09/40] PCI: keystone: Remove redundant platform_set_drvdata Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 10/40] PCI: keystone: Use uniform function naming convention Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 11/40] dt-bindings: PCI: keystone: Add bindings to get device control module Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-25 11:25   ` Rob Herring
2018-09-25 11:25     ` Rob Herring
2018-09-21 10:21 ` [RFC PATCH 12/40] PCI: keystone: Use syscon APIs to get device id from " Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 13/40] dt-bindings: PCI: keystone: Add "reg-names" binding information Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-24 23:00   ` Rob Herring
2018-09-24 23:00     ` Rob Herring
2018-11-02  7:19     ` Kishon Vijay Abraham I
2018-11-02  7:19       ` Kishon Vijay Abraham I
2018-11-02  7:19       ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 14/40] PCI: keystone: Use platform_get_resource_byname to get memory resources Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 15/40] PCI: keystone: Cleanup PHY handling Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 16/40] PCI: keystone: Invoke pm_runtime APIs to enable clock Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 17/40] PCI: keystone: Cleanup configuration space access Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 18/40] PCI: keystone: Get number of OB windows from DT and cleanup MEM space configuration Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 19/40] PCI: keystone: Cleanup set_dbi_mode and get_dbi_mode Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 20/40] PCI: keystone: Cleanup ks_pcie_link_up() Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 21/40] PCI: keystone: Add debug error message for all errors Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 22/40] PCI: keystone: Reorder header file in alphabetical order Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 23/40] PCI: keystone: Cleanup macros defined in pci-keystone.c Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 24/40] PCI: keystone: Move initializations to appropriate places Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 25/40] dt-bindings: PCI: Add dt-binding to configure PCIe mode Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 26/40] PCI: keystone: Explicitly set the " Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 27/40] dt-bindings: PCI: Document "atu" reg-names Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 28/40] PCI: dwc: Fix ATU identification for designware version >= 4.80 Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 29/40] PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 30/40] dt-bindings: PCI: Add PCI RC dt binding documentation for AM654 Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 31/40] PCI: keystone: Add support for PCIe in AM654x Platforms Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 32/40] phy: core: Invoke pm_runtime_get_*/pm_runtime_put_* before invoking reset callback Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 33/40] dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 34/40] phy: ti: Add a new SERDES driver for TI's " Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 35/40] ARM: dts: keystone-k2e: Use the updated binding to describe PCIe in k2e Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 36/40] arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to gic_its Kishon Vijay Abraham I
2018-09-21 10:21   ` [RFC PATCH 36/40] arm64: dts: k3-am6: Add "socionext, synquacer-pre-its" " Kishon Vijay Abraham I
2018-09-21 10:21   ` [RFC PATCH 36/40] arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" " Kishon Vijay Abraham I
2018-09-21 19:42   ` Nishanth Menon
2018-09-21 19:42     ` Nishanth Menon
2018-09-21 19:42     ` Nishanth Menon
2018-09-21 10:21 ` [RFC PATCH 37/40] arm64: dts: k3-am6: Add Main System Control Module node Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 38/40] arm64: dts: k3-am6: Add mux-controller dt node required for muxing SERDES Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` [RFC PATCH 39/40] arm64: dts: k3-am6: Add SERDES DT node Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-09-21 10:21 ` Kishon Vijay Abraham I [this message]
2018-09-21 10:21   ` [RFC PATCH 40/40] arm64: dts: k3-am6: Add Root Complex PCIe dt node Kishon Vijay Abraham I
2018-09-21 10:21   ` Kishon Vijay Abraham I
2018-10-12 13:47 ` [RFC PATCH 00/40] Cleanup pci-keystone.c and Add AM654 PCIe Support Lorenzo Pieralisi
2018-10-12 13:47   ` Lorenzo Pieralisi

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