From: Bibby Hsieh <bibby.hsieh@mediatek.com>
To: David Airlie <airlied@linux.ie>,
Matthias Brugger <matthias.bgg@gmail.com>,
Daniel Vetter <daniel.vetter@ffwll.ch>,
<dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>
Cc: Yingjoe Chen <yingjoe.chen@mediatek.com>,
Cawa Cheng <cawa.cheng@mediatek.com>,
Daniel Kurtz <djkurtz@chromium.org>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
YT Shen <yt.shen@mediatek.com>,
Thierry Reding <thierry.reding@gmail.com>,
CK Hu <ck.hu@mediatek.com>, Mao Huang <littlecvr@chromium.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
Sascha Hauer <kernel@pengutronix.de>
Subject: [PATCH v4 10/11] drm/mediatek: implement connection from BLS to DPI0
Date: Tue, 2 Oct 2018 16:10:40 +0800 [thread overview]
Message-ID: <20181002081041.32629-11-bibby.hsieh@mediatek.com> (raw)
In-Reply-To: <20181002081041.32629-1-bibby.hsieh@mediatek.com>
Modify display driver to support connection from BLS to DPI.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 87e4191c250e..f3068c62ed48 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -39,6 +39,7 @@
#define DISP_REG_CONFIG_DISP_OVL_MOUT_EN 0x030
#define DISP_REG_CONFIG_OUT_SEL 0x04c
#define DISP_REG_CONFIG_DSI_SEL 0x050
+#define DISP_REG_CONFIG_DPI_SEL 0x064
#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
@@ -132,7 +133,10 @@
#define OVL_MOUT_EN_RDMA 0x1
#define BLS_TO_DSI_RDMA1_TO_DPI1 0x8
+#define BLS_TO_DPI_RDMA1_TO_DSI 0x2
#define DSI_SEL_IN_BLS 0x0
+#define DPI_SEL_IN_BLS 0x0
+#define DSI_SEL_IN_RDMA 0x1
struct mtk_disp_mutex {
int id;
@@ -323,9 +327,17 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next)
{
- if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
+ if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
config_regs + DISP_REG_CONFIG_OUT_SEL);
+ } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
+ writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
+ config_regs + DISP_REG_CONFIG_OUT_SEL);
+ writel_relaxed(DSI_SEL_IN_RDMA,
+ config_regs + DISP_REG_CONFIG_DSI_SEL);
+ writel_relaxed(DPI_SEL_IN_BLS,
+ config_regs + DISP_REG_CONFIG_DPI_SEL);
+ }
}
void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
--
2.12.5.2.gbdf23ab
WARNING: multiple messages have this Message-ID (diff)
From: Bibby Hsieh <bibby.hsieh@mediatek.com>
To: David Airlie <airlied@linux.ie>,
Matthias Brugger <matthias.bgg@gmail.com>,
Daniel Vetter <daniel.vetter@ffwll.ch>,
dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org
Cc: Yingjoe Chen <yingjoe.chen@mediatek.com>,
Cawa Cheng <cawa.cheng@mediatek.com>,
Daniel Kurtz <djkurtz@chromium.org>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
YT Shen <yt.shen@mediatek.com>,
Thierry Reding <thierry.reding@gmail.com>,
CK Hu <ck.hu@mediatek.com>, Mao Huang <littlecvr@chromium.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Sascha Hauer <kernel@pengutronix.de>
Subject: [PATCH v4 10/11] drm/mediatek: implement connection from BLS to DPI0
Date: Tue, 2 Oct 2018 16:10:40 +0800 [thread overview]
Message-ID: <20181002081041.32629-11-bibby.hsieh@mediatek.com> (raw)
In-Reply-To: <20181002081041.32629-1-bibby.hsieh@mediatek.com>
Modify display driver to support connection from BLS to DPI.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 87e4191c250e..f3068c62ed48 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -39,6 +39,7 @@
#define DISP_REG_CONFIG_DISP_OVL_MOUT_EN 0x030
#define DISP_REG_CONFIG_OUT_SEL 0x04c
#define DISP_REG_CONFIG_DSI_SEL 0x050
+#define DISP_REG_CONFIG_DPI_SEL 0x064
#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
@@ -132,7 +133,10 @@
#define OVL_MOUT_EN_RDMA 0x1
#define BLS_TO_DSI_RDMA1_TO_DPI1 0x8
+#define BLS_TO_DPI_RDMA1_TO_DSI 0x2
#define DSI_SEL_IN_BLS 0x0
+#define DPI_SEL_IN_BLS 0x0
+#define DSI_SEL_IN_RDMA 0x1
struct mtk_disp_mutex {
int id;
@@ -323,9 +327,17 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next)
{
- if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
+ if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
config_regs + DISP_REG_CONFIG_OUT_SEL);
+ } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
+ writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
+ config_regs + DISP_REG_CONFIG_OUT_SEL);
+ writel_relaxed(DSI_SEL_IN_RDMA,
+ config_regs + DISP_REG_CONFIG_DSI_SEL);
+ writel_relaxed(DPI_SEL_IN_BLS,
+ config_regs + DISP_REG_CONFIG_DPI_SEL);
+ }
}
void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
--
2.12.5.2.gbdf23ab
WARNING: multiple messages have this Message-ID (diff)
From: bibby.hsieh@mediatek.com (Bibby Hsieh)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 10/11] drm/mediatek: implement connection from BLS to DPI0
Date: Tue, 2 Oct 2018 16:10:40 +0800 [thread overview]
Message-ID: <20181002081041.32629-11-bibby.hsieh@mediatek.com> (raw)
In-Reply-To: <20181002081041.32629-1-bibby.hsieh@mediatek.com>
Modify display driver to support connection from BLS to DPI.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 87e4191c250e..f3068c62ed48 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -39,6 +39,7 @@
#define DISP_REG_CONFIG_DISP_OVL_MOUT_EN 0x030
#define DISP_REG_CONFIG_OUT_SEL 0x04c
#define DISP_REG_CONFIG_DSI_SEL 0x050
+#define DISP_REG_CONFIG_DPI_SEL 0x064
#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
@@ -132,7 +133,10 @@
#define OVL_MOUT_EN_RDMA 0x1
#define BLS_TO_DSI_RDMA1_TO_DPI1 0x8
+#define BLS_TO_DPI_RDMA1_TO_DSI 0x2
#define DSI_SEL_IN_BLS 0x0
+#define DPI_SEL_IN_BLS 0x0
+#define DSI_SEL_IN_RDMA 0x1
struct mtk_disp_mutex {
int id;
@@ -323,9 +327,17 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next)
{
- if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0)
+ if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
config_regs + DISP_REG_CONFIG_OUT_SEL);
+ } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
+ writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
+ config_regs + DISP_REG_CONFIG_OUT_SEL);
+ writel_relaxed(DSI_SEL_IN_RDMA,
+ config_regs + DISP_REG_CONFIG_DSI_SEL);
+ writel_relaxed(DPI_SEL_IN_BLS,
+ config_regs + DISP_REG_CONFIG_DPI_SEL);
+ }
}
void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
--
2.12.5.2.gbdf23ab
next prev parent reply other threads:[~2018-10-02 8:11 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-02 8:10 [PATCH v4 00/11] drm/mediatek: support hdmi output for mt2701 and mt7623 Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` [PATCH v4 01/11] drm/mediatek: add refcount for DPI power on/off Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:28 ` CK Hu
2018-10-02 8:28 ` CK Hu
2018-10-02 8:28 ` CK Hu
2018-10-02 8:10 ` [PATCH v4 02/11] drm/mediatek: move hardware register to node data Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` [PATCH v4 03/11] drm/mediatek: adjust EDGE to match clock and data Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` [PATCH v4 04/11] drm/mediatek: add clock factor for different IC Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` [PATCH v4 05/11] drm/mediatek: convert dpi driver to use drm_of_find_panel_or_bridge Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:32 ` CK Hu
2018-10-02 8:32 ` CK Hu
2018-10-02 8:32 ` CK Hu
2018-10-02 8:10 ` [PATCH v4 06/11] drm/mediatek: add dpi driver for mt2701 and mt7623 Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` [PATCH v4 07/11] drm/mediatek: separate hdmi phy to different file Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:40 ` CK Hu
2018-10-02 8:40 ` CK Hu
2018-10-02 8:40 ` CK Hu
2018-10-02 8:10 ` [PATCH v4 08/11] drm/mediatek: add support for SPDIF audio in HDMI Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` [PATCH v4 09/11] drm/mediatek: add hdmi driver for MT2701 and MT7623 Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh [this message]
2018-10-02 8:10 ` [PATCH v4 10/11] drm/mediatek: implement connection from BLS to DPI0 Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` [PATCH v4 11/11] drm/mediatek: add a error return value when clock driver has been prepared Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
2018-10-02 8:10 ` Bibby Hsieh
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