From: Kishon Vijay Abraham I <kishon@ti.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Murali Karicheri <m-karicheri2@ti.com>,
Jingoo Han <jingoohan1@gmail.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Rob Herring <robh+dt@kernel.org>, <linux-pci@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Kishon Vijay Abraham I <kishon@ti.com>
Subject: [PATCH 16/19] PCI: keystone: Cleanup ks_pcie_link_up()
Date: Mon, 15 Oct 2018 18:37:18 +0530 [thread overview]
Message-ID: <20181015130721.5535-17-kishon@ti.com> (raw)
In-Reply-To: <20181015130721.5535-1-kishon@ti.com>
ks_pcie_link_up() uses registers from the designware core to get the
status of the link. Move the register defines to pcie-designware.h
and cleanup ks_pcie_link_up().
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/pci/controller/dwc/pci-keystone.c | 11 +++--------
drivers/pci/controller/dwc/pcie-designware.h | 4 ++++
2 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 7015a353a614..67646a64c895 100644
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -38,8 +38,6 @@
/* Application register defines */
#define LTSSM_EN_VAL BIT(0)
-#define LTSSM_STATE_MASK 0x1f
-#define LTSSM_STATE_L0 0x11
#define DBI_CS2 BIT(5)
#define OB_XLAT_EN_VAL BIT(1)
@@ -91,11 +89,7 @@
#define OB_OFFSET_HI(n) (0x204 + (8 * (n)))
-/* Config space registers */
-#define DEBUG0 0x728
-
#define MAX_MSI_HOST_IRQS 8
-
/* PCIE controller device IDs */
#define PCIE_RC_K2HK 0xb008
#define PCIE_RC_K2E 0xb009
@@ -446,8 +440,9 @@ static int ks_pcie_link_up(struct dw_pcie *pci)
{
u32 val;
- val = dw_pcie_readl_dbi(pci, DEBUG0);
- return (val & LTSSM_STATE_MASK) == LTSSM_STATE_L0;
+ val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0);
+ val &= PORT_LOGIC_LTSSM_STATE_MASK;
+ return (val == PORT_LOGIC_LTSSM_STATE_L0);
}
static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 9f1a5e399b70..0989d880ac46 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -36,6 +36,10 @@
#define PORT_LINK_MODE_4_LANES (0x7 << 16)
#define PORT_LINK_MODE_8_LANES (0xf << 16)
+#define PCIE_PORT_DEBUG0 0x728
+#define PORT_LOGIC_LTSSM_STATE_MASK 0x1f
+#define PORT_LOGIC_LTSSM_STATE_L0 0x11
+
#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
#define PORT_LOGIC_LINK_WIDTH_MASK (0x1f << 8)
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Murali Karicheri <m-karicheri2@ti.com>,
Jingoo Han <jingoohan1@gmail.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Rob Herring <robh+dt@kernel.org>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Kishon Vijay Abraham I <kishon@ti.com>
Subject: [PATCH 16/19] PCI: keystone: Cleanup ks_pcie_link_up()
Date: Mon, 15 Oct 2018 18:37:18 +0530 [thread overview]
Message-ID: <20181015130721.5535-17-kishon@ti.com> (raw)
In-Reply-To: <20181015130721.5535-1-kishon@ti.com>
ks_pcie_link_up() uses registers from the designware core to get the
status of the link. Move the register defines to pcie-designware.h
and cleanup ks_pcie_link_up().
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/pci/controller/dwc/pci-keystone.c | 11 +++--------
drivers/pci/controller/dwc/pcie-designware.h | 4 ++++
2 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 7015a353a614..67646a64c895 100644
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -38,8 +38,6 @@
/* Application register defines */
#define LTSSM_EN_VAL BIT(0)
-#define LTSSM_STATE_MASK 0x1f
-#define LTSSM_STATE_L0 0x11
#define DBI_CS2 BIT(5)
#define OB_XLAT_EN_VAL BIT(1)
@@ -91,11 +89,7 @@
#define OB_OFFSET_HI(n) (0x204 + (8 * (n)))
-/* Config space registers */
-#define DEBUG0 0x728
-
#define MAX_MSI_HOST_IRQS 8
-
/* PCIE controller device IDs */
#define PCIE_RC_K2HK 0xb008
#define PCIE_RC_K2E 0xb009
@@ -446,8 +440,9 @@ static int ks_pcie_link_up(struct dw_pcie *pci)
{
u32 val;
- val = dw_pcie_readl_dbi(pci, DEBUG0);
- return (val & LTSSM_STATE_MASK) == LTSSM_STATE_L0;
+ val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0);
+ val &= PORT_LOGIC_LTSSM_STATE_MASK;
+ return (val == PORT_LOGIC_LTSSM_STATE_L0);
}
static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 9f1a5e399b70..0989d880ac46 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -36,6 +36,10 @@
#define PORT_LINK_MODE_4_LANES (0x7 << 16)
#define PORT_LINK_MODE_8_LANES (0xf << 16)
+#define PCIE_PORT_DEBUG0 0x728
+#define PORT_LOGIC_LTSSM_STATE_MASK 0x1f
+#define PORT_LOGIC_LTSSM_STATE_L0 0x11
+
#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
#define PORT_LOGIC_LINK_WIDTH_MASK (0x1f << 8)
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: kishon@ti.com (Kishon Vijay Abraham I)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 16/19] PCI: keystone: Cleanup ks_pcie_link_up()
Date: Mon, 15 Oct 2018 18:37:18 +0530 [thread overview]
Message-ID: <20181015130721.5535-17-kishon@ti.com> (raw)
In-Reply-To: <20181015130721.5535-1-kishon@ti.com>
ks_pcie_link_up() uses registers from the designware core to get the
status of the link. Move the register defines to pcie-designware.h
and cleanup ks_pcie_link_up().
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/pci/controller/dwc/pci-keystone.c | 11 +++--------
drivers/pci/controller/dwc/pcie-designware.h | 4 ++++
2 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 7015a353a614..67646a64c895 100644
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -38,8 +38,6 @@
/* Application register defines */
#define LTSSM_EN_VAL BIT(0)
-#define LTSSM_STATE_MASK 0x1f
-#define LTSSM_STATE_L0 0x11
#define DBI_CS2 BIT(5)
#define OB_XLAT_EN_VAL BIT(1)
@@ -91,11 +89,7 @@
#define OB_OFFSET_HI(n) (0x204 + (8 * (n)))
-/* Config space registers */
-#define DEBUG0 0x728
-
#define MAX_MSI_HOST_IRQS 8
-
/* PCIE controller device IDs */
#define PCIE_RC_K2HK 0xb008
#define PCIE_RC_K2E 0xb009
@@ -446,8 +440,9 @@ static int ks_pcie_link_up(struct dw_pcie *pci)
{
u32 val;
- val = dw_pcie_readl_dbi(pci, DEBUG0);
- return (val & LTSSM_STATE_MASK) == LTSSM_STATE_L0;
+ val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0);
+ val &= PORT_LOGIC_LTSSM_STATE_MASK;
+ return (val == PORT_LOGIC_LTSSM_STATE_L0);
}
static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 9f1a5e399b70..0989d880ac46 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -36,6 +36,10 @@
#define PORT_LINK_MODE_4_LANES (0x7 << 16)
#define PORT_LINK_MODE_8_LANES (0xf << 16)
+#define PCIE_PORT_DEBUG0 0x728
+#define PORT_LOGIC_LTSSM_STATE_MASK 0x1f
+#define PORT_LOGIC_LTSSM_STATE_L0 0x11
+
#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
#define PORT_LOGIC_LINK_WIDTH_MASK (0x1f << 8)
--
2.17.1
next prev parent reply other threads:[~2018-10-15 13:10 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-15 13:07 [PATCH 00/19] PCI: Cleanup pci-keystone driver Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 01/19] PCI: keystone: Use quirk to limit MRRS for K2G Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 02/19] PCI: keystone: Use quirk to set MRRS for PCI host bridge Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 03/19] PCI: keystone: Move dw_pcie_setup_rc out of ks_pcie_establish_link() Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 04/19] PCI: keystone: Do not initiate link training multiple times Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 05/19] PCI: keystone: Remove unused argument from ks_dw_pcie_host_init() Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 06/19] PCI: keystone: Merge pci-keystone-dw.c and pci-keystone.c Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 07/19] PCI: keystone: Remove redundant platform_set_drvdata Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 08/19] PCI: keystone: Use uniform function naming convention Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 09/19] dt-bindings: PCI: keystone: Add bindings to get device control module Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 10/19] PCI: keystone: Use syscon APIs to get device id from " Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 11/19] PCI: keystone: Cleanup PHY handling Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-16 17:06 ` Lorenzo Pieralisi
2018-10-16 17:06 ` Lorenzo Pieralisi
2018-10-17 3:21 ` Kishon Vijay Abraham I
2018-10-17 3:21 ` Kishon Vijay Abraham I
2018-10-17 3:21 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 12/19] PCI: keystone: Invoke pm_runtime APIs to enable clock Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 13/19] PCI: keystone: Cleanup configuration space access Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 14/19] PCI: keystone: Get number of OB windows from DT and cleanup MEM space configuration Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 15/19] PCI: keystone: Cleanup set_dbi_mode and get_dbi_mode Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I [this message]
2018-10-15 13:07 ` [PATCH 16/19] PCI: keystone: Cleanup ks_pcie_link_up() Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 17/19] PCI: keystone: Add debug error message for all errors Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 18/19] PCI: keystone: Reorder header file in alphabetical order Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` [PATCH 19/19] PCI: keystone: Cleanup macros defined in pci-keystone.c Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
2018-10-15 13:07 ` Kishon Vijay Abraham I
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