All of lore.kernel.org
 help / color / mirror / Atom feed
From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Harry Wentland <harry.wentland@amd.com>
Subject: [PATCH v9 04/24] drm/dsc: Define Rate Control values that do not change over configurations
Date: Tue, 13 Nov 2018 17:52:12 -0800	[thread overview]
Message-ID: <20181114015232.21952-5-manasi.d.navare@intel.com> (raw)
In-Reply-To: <20181114015232.21952-1-manasi.d.navare@intel.com>

From: "Srivatsa, Anusha" <anusha.srivatsa@intel.com>

DSC has some Rate Control values that remain constant
across all configurations. These are as per the DSC
standard.

v3:
* Define them in drm_dsc.h as they are
DSC constants (Manasi)
v2:
* Add DP_DSC_ prefix (Jani Nikula)

Cc: dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
---
 include/drm/drm_dsc.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h
index 3292dfed9d0a..b88e31bd9da7 100644
--- a/include/drm/drm_dsc.h
+++ b/include/drm/drm_dsc.h
@@ -18,6 +18,12 @@
 #define DSC_SCALE_DECREMENT_INTERVAL_MAX	4095
 #define DSC_RANGE_BPG_OFFSET_MASK		0x3f
 
+/* DSC Rate Control Constants */
+#define DSC_RC_MODEL_SIZE_CONST		    8192
+#define DSC_RC_EDGE_FACTOR_CONST	    6
+#define DSC_RC_TGT_OFFSET_HI_CONST	    3
+#define DSC_RC_TGT_OFFSET_LO_CONST	    3
+
 /* Configuration for a single Rate Control model range */
 struct drm_dsc_rc_range_parameters {
 	/* Min Quantization Parameters allowed for this range */
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-11-14  1:52 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-14  1:52 [PATCH v9 00/24] Remaining DSC + FEC patches Manasi Navare
2018-11-14  1:52 ` [PATCH v9 01/24] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities Manasi Navare
2018-11-19 19:43   ` Ville Syrjälä
2018-11-19 20:10     ` Manasi Navare
2018-11-19 20:33       ` Ville Syrjälä
2018-11-19 22:11         ` Manasi Navare
2018-11-14  1:52 ` [PATCH v9 02/24] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-14  1:52 ` [PATCH v9 03/24] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-11-14  1:52 ` Manasi Navare [this message]
2018-11-14  1:52 ` [PATCH v9 05/24] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-14  1:52 ` [PATCH v9 06/24] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-11-14  1:52 ` [PATCH v9 07/24] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-11-14  1:52 ` [PATCH v9 08/24] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-11-19 20:11   ` Ville Syrjälä
2018-11-19 21:54     ` Manasi Navare
2018-11-14  1:52 ` [PATCH v9 09/24] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-11-14  1:52 ` [PATCH v9 10/24] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-11-14  1:52 ` [PATCH v9 11/24] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-11-14  1:52 ` [PATCH v9 12/24] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-11-14  1:52 ` [PATCH v9 13/24] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-11-14  1:52 ` [PATCH v9 14/24] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-11-19 20:17   ` Ville Syrjälä
2018-11-14  1:52 ` [PATCH v9 15/24] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-11-14  1:52 ` [PATCH v9 16/24] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-11-14  1:52 ` [PATCH v9 17/24] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-11-14  1:52 ` [PATCH v9 18/24] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-11-14  1:52 ` [PATCH v9 19/24] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-11-14  1:52 ` [PATCH v9 20/24] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable Manasi Navare
2018-11-16  1:39   ` Manasi Navare
2018-11-19 20:27     ` Ville Syrjälä
2018-11-19 22:28       ` Manasi Navare
2018-11-14  1:52 ` [PATCH v9 21/24] i915/dp/fec: Add fec_enable to the crtc state Manasi Navare
2018-11-14  1:52 ` [PATCH v9 22/24] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION Manasi Navare
2018-11-19 20:19   ` Ville Syrjälä
2018-11-20  0:43     ` Manasi Navare
2018-11-20 17:13     ` Manasi Navare
2018-11-14  1:52 ` [PATCH v9 23/24] i915/dp/fec: Configure the Forward Error Correction bits Manasi Navare
2018-11-14  1:52 ` [PATCH v9 24/24] drm/i915/fec: Disable FEC state Manasi Navare
2018-11-14  2:14 ` ✗ Fi.CI.CHECKPATCH: warning for Remaining DSC + FEC patches Patchwork
2018-11-14  2:23 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-14  4:45 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-14  7:51 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181114015232.21952-5-manasi.d.navare@intel.com \
    --to=manasi.d.navare@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=harry.wentland@amd.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.