From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: <devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
linux-pci@vger.kernel.org, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Antoine Tenart <antoine.tenart@bootlin.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v3 03/15] PCI: aardvark: Add clock support
Date: Tue, 8 Jan 2019 17:24:28 +0100 [thread overview]
Message-ID: <20190108162441.5278-4-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com>
The IP relies on a gated clock. When we will add S2RAM support, this
clock will need to be resumed before any PCIe registers are
accessed. Add support for this clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/pci/controller/pci-aardvark.c | 29 +++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 0f50163ae072..b1b8897d2d28 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -8,6 +8,7 @@
* Author: Hezi Shahmoon <hezi.shahmoon@marvell.com>
*/
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
@@ -187,6 +188,7 @@
struct advk_pcie {
struct platform_device *pdev;
+ struct clk *clk;
void __iomem *base;
struct list_head resources;
struct irq_domain *irq_domain;
@@ -973,6 +975,29 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
return err;
}
+static int advk_pcie_setup_clk(struct advk_pcie *pcie)
+{
+ struct device *dev = &pcie->pdev->dev;
+ int ret;
+
+ pcie->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(pcie->clk) && (PTR_ERR(pcie->clk) == -EPROBE_DEFER))
+ return PTR_ERR(pcie->clk);
+
+ /* Old bindings miss the clock handle */
+ if (IS_ERR(pcie->clk)) {
+ dev_warn(dev, "Clock unavailable (%ld)\n", PTR_ERR(pcie->clk));
+ pcie->clk = NULL;
+ return 0;
+ }
+
+ ret = clk_prepare_enable(pcie->clk);
+ if (ret)
+ dev_err(dev, "Clock initialization failed (%d)\n", ret);
+
+ return ret;
+}
+
static int advk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1008,6 +1033,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
return ret;
}
+ ret = advk_pcie_setup_clk(pcie);
+ if (ret)
+ return ret;
+
advk_pcie_setup_hw(pcie);
advk_sw_pci_bridge_init(pcie);
--
2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Antoine Tenart <antoine.tenart@bootlin.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v3 03/15] PCI: aardvark: Add clock support
Date: Tue, 8 Jan 2019 17:24:28 +0100 [thread overview]
Message-ID: <20190108162441.5278-4-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com>
The IP relies on a gated clock. When we will add S2RAM support, this
clock will need to be resumed before any PCIe registers are
accessed. Add support for this clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/pci/controller/pci-aardvark.c | 29 +++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 0f50163ae072..b1b8897d2d28 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -8,6 +8,7 @@
* Author: Hezi Shahmoon <hezi.shahmoon@marvell.com>
*/
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
@@ -187,6 +188,7 @@
struct advk_pcie {
struct platform_device *pdev;
+ struct clk *clk;
void __iomem *base;
struct list_head resources;
struct irq_domain *irq_domain;
@@ -973,6 +975,29 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
return err;
}
+static int advk_pcie_setup_clk(struct advk_pcie *pcie)
+{
+ struct device *dev = &pcie->pdev->dev;
+ int ret;
+
+ pcie->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(pcie->clk) && (PTR_ERR(pcie->clk) == -EPROBE_DEFER))
+ return PTR_ERR(pcie->clk);
+
+ /* Old bindings miss the clock handle */
+ if (IS_ERR(pcie->clk)) {
+ dev_warn(dev, "Clock unavailable (%ld)\n", PTR_ERR(pcie->clk));
+ pcie->clk = NULL;
+ return 0;
+ }
+
+ ret = clk_prepare_enable(pcie->clk);
+ if (ret)
+ dev_err(dev, "Clock initialization failed (%d)\n", ret);
+
+ return ret;
+}
+
static int advk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1008,6 +1033,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
return ret;
}
+ ret = advk_pcie_setup_clk(pcie);
+ if (ret)
+ return ret;
+
advk_pcie_setup_hw(pcie);
advk_sw_pci_bridge_init(pcie);
--
2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Antoine Tenart <antoine.tenart@bootlin.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Rob Herring <robh+dt@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 03/15] PCI: aardvark: Add clock support
Date: Tue, 8 Jan 2019 17:24:28 +0100 [thread overview]
Message-ID: <20190108162441.5278-4-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com>
The IP relies on a gated clock. When we will add S2RAM support, this
clock will need to be resumed before any PCIe registers are
accessed. Add support for this clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/pci/controller/pci-aardvark.c | 29 +++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 0f50163ae072..b1b8897d2d28 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -8,6 +8,7 @@
* Author: Hezi Shahmoon <hezi.shahmoon@marvell.com>
*/
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
@@ -187,6 +188,7 @@
struct advk_pcie {
struct platform_device *pdev;
+ struct clk *clk;
void __iomem *base;
struct list_head resources;
struct irq_domain *irq_domain;
@@ -973,6 +975,29 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
return err;
}
+static int advk_pcie_setup_clk(struct advk_pcie *pcie)
+{
+ struct device *dev = &pcie->pdev->dev;
+ int ret;
+
+ pcie->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(pcie->clk) && (PTR_ERR(pcie->clk) == -EPROBE_DEFER))
+ return PTR_ERR(pcie->clk);
+
+ /* Old bindings miss the clock handle */
+ if (IS_ERR(pcie->clk)) {
+ dev_warn(dev, "Clock unavailable (%ld)\n", PTR_ERR(pcie->clk));
+ pcie->clk = NULL;
+ return 0;
+ }
+
+ ret = clk_prepare_enable(pcie->clk);
+ if (ret)
+ dev_err(dev, "Clock initialization failed (%d)\n", ret);
+
+ return ret;
+}
+
static int advk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1008,6 +1033,10 @@ static int advk_pcie_probe(struct platform_device *pdev)
return ret;
}
+ ret = advk_pcie_setup_clk(pcie);
+ if (ret)
+ return ret;
+
advk_pcie_setup_hw(pcie);
advk_sw_pci_bridge_init(pcie);
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-01-08 16:24 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-08 16:24 [PATCH v3 00/15] Bring suspend to RAM support to PCIe Aardvark driver Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 01/15] PCI: aardvark: Enlarge PIO timeout Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 02/15] PCI: aardvark: Configure more registers in the configuration helper Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal [this message]
2019-01-08 16:24 ` [PATCH v3 03/15] PCI: aardvark: Add clock support Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 04/15] PCI: aardvark: Add PHY support Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 05/15] PCI: aardvark: Add PCIe warm reset support Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 06/15] PCI: aardvark: Add external reset GPIO support Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 07/15] PCI: aardvark: Add suspend to RAM support Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 08/15] dt-bindings: PCI: aardvark: Describe the clocks property Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 09/15] dt-bindings: PCI: aardvark: Describe the PHY property Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 10/15] dt-bindings: PCI: aardvark: Describe the PCIe endpoint card reset pins Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-15 20:13 ` Rob Herring
2019-01-15 20:13 ` Rob Herring
2019-01-15 20:13 ` Rob Herring
2019-01-08 16:24 ` [PATCH v3 11/15] dt-bindings: PCI: aardvark: Describe the reset-gpios property Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 12/15] ARM64: dts: marvell: armada-37xx: declare PCIe clock Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` [PATCH v3 13/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-02-06 14:17 ` Gregory CLEMENT
2019-02-06 14:17 ` Gregory CLEMENT
2019-02-06 14:17 ` Gregory CLEMENT
2019-01-08 16:24 ` [PATCH v3 14/15] ARM64: dts: marvell: armada-37xx: declare PCIe reset pin Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-02-06 11:11 ` Gregory CLEMENT
2019-02-06 11:11 ` Gregory CLEMENT
2019-02-06 11:11 ` Gregory CLEMENT
2019-01-08 16:24 ` [PATCH v3 15/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe warm " Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-01-08 16:24 ` Miquel Raynal
2019-02-06 11:12 ` Gregory CLEMENT
2019-02-06 11:12 ` Gregory CLEMENT
2019-02-06 11:12 ` Gregory CLEMENT
2019-01-18 16:51 ` [PATCH v3 00/15] Bring suspend to RAM support to PCIe Aardvark driver Gregory CLEMENT
2019-01-18 16:51 ` Gregory CLEMENT
2019-01-18 16:51 ` Gregory CLEMENT
2019-01-20 15:16 ` Miquel Raynal
2019-01-20 15:16 ` Miquel Raynal
2019-01-20 15:16 ` Miquel Raynal
2019-01-23 17:05 ` Lorenzo Pieralisi
2019-01-23 17:05 ` Lorenzo Pieralisi
2019-01-25 10:05 ` Miquel Raynal
2019-01-25 10:05 ` Miquel Raynal
2019-01-25 12:40 ` Lorenzo Pieralisi
2019-01-25 12:40 ` Lorenzo Pieralisi
2019-01-25 12:57 ` Miquel Raynal
2019-01-25 12:57 ` Miquel Raynal
2019-01-25 17:38 ` Lorenzo Pieralisi
2019-01-25 17:38 ` Lorenzo Pieralisi
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