From: Nava kishore Manne <nava.manne@xilinx.com>
To: <atull@kernel.org>, <mdf@kernel.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <michal.simek@xilinx.com>,
<rajanv@xilinx.com>, <jollys@xilinx.com>, <nava.manne@xilinx.com>,
<linux-fpga@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <chinnikishore369@gmail.com>
Cc: Rajan Vaja <rajan.vaja@xilinx.com>
Subject: [PATCH v4 1/6] dt-bindings: power: Add ZynqMP power domain bindings
Date: Thu, 14 Mar 2019 19:31:17 +0530 [thread overview]
Message-ID: <20190314140122.23372-2-nava.manne@xilinx.com> (raw)
In-Reply-To: <20190314140122.23372-1-nava.manne@xilinx.com>
From: Rajan Vaja <rajan.vaja@xilinx.com>
Add documentation to describe ZynqMP power domain bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/power/xlnx,zynqmp-genpd.txt | 34 ++++++++++++++++
include/dt-bindings/power/xlnx-zynqmp-power.h | 39 +++++++++++++++++++
2 files changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
create mode 100644 include/dt-bindings/power/xlnx-zynqmp-power.h
diff --git a/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
new file mode 100644
index 000000000000..3c7f2378e146
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
@@ -0,0 +1,34 @@
+-----------------------------------------------------------
+Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
+-----------------------------------------------------------
+The binding for zynqmp-power-controller follow the common
+generic PM domain binding[1].
+
+[1] Documentation/devicetree/bindings/power/power_domain.txt
+
+== Zynq MPSoC Generic PM Domain Node ==
+
+Required property:
+ - Below property should be in zynqmp-firmware node.
+ - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.
+
+Power domain ID indexes are mentioned in
+include/dt-bindings/power/xlnx-zynqmp-power.h.
+
+-------
+Example
+-------
+
+firmware {
+ zynqmp_firmware: zynqmp-firmware {
+ ...
+ #power-domain-cells = <1>;
+ ...
+ };
+};
+
+sata {
+ ...
+ power-domains = <&zynqmp_firmware 2>;
+ ...
+};
diff --git a/include/dt-bindings/power/xlnx-zynqmp-power.h b/include/dt-bindings/power/xlnx-zynqmp-power.h
new file mode 100644
index 000000000000..1bc9636098ca
--- /dev/null
+++ b/include/dt-bindings/power/xlnx-zynqmp-power.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#ifndef _DT_BINDINGS_ZYNQMP_POWER_H
+#define _DT_BINDINGS_ZYNQMP_POWER_H
+
+#define PD_USB_0 0
+#define PD_USB_1 1
+#define PD_SATA 2
+#define PD_SPI_0 3
+#define PD_SPI_1 4
+#define PD_UART_0 5
+#define PD_UART_1 6
+#define PD_ETH_0 7
+#define PD_ETH_1 8
+#define PD_ETH_2 9
+#define PD_ETH_3 10
+#define PD_I2C_0 11
+#define PD_I2C_1 12
+#define PD_DP 13
+#define PD_GDMA 14
+#define PD_ADMA 15
+#define PD_TTC_0 16
+#define PD_TTC_1 17
+#define PD_TTC_2 18
+#define PD_TTC_3 19
+#define PD_SD_0 20
+#define PD_SD_1 21
+#define PD_NAND 22
+#define PD_QSPI 23
+#define PD_GPIO 24
+#define PD_CAN_0 25
+#define PD_CAN_1 26
+#define PD_PCIE 27
+#define PD_GPU 28
+
+#endif
--
2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Nava kishore Manne <nava.manne@xilinx.com>
To: atull@kernel.org, mdf@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, michal.simek@xilinx.com, rajanv@xilinx.com,
jollys@xilinx.com, nava.manne@xilinx.com,
linux-fpga@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, chinnikishore369@gmail.com
Cc: Rajan Vaja <rajan.vaja@xilinx.com>
Subject: [PATCH v4 1/6] dt-bindings: power: Add ZynqMP power domain bindings
Date: Thu, 14 Mar 2019 19:31:17 +0530 [thread overview]
Message-ID: <20190314140122.23372-2-nava.manne@xilinx.com> (raw)
In-Reply-To: <20190314140122.23372-1-nava.manne@xilinx.com>
From: Rajan Vaja <rajan.vaja@xilinx.com>
Add documentation to describe ZynqMP power domain bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/power/xlnx,zynqmp-genpd.txt | 34 ++++++++++++++++
include/dt-bindings/power/xlnx-zynqmp-power.h | 39 +++++++++++++++++++
2 files changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
create mode 100644 include/dt-bindings/power/xlnx-zynqmp-power.h
diff --git a/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
new file mode 100644
index 000000000000..3c7f2378e146
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
@@ -0,0 +1,34 @@
+-----------------------------------------------------------
+Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
+-----------------------------------------------------------
+The binding for zynqmp-power-controller follow the common
+generic PM domain binding[1].
+
+[1] Documentation/devicetree/bindings/power/power_domain.txt
+
+== Zynq MPSoC Generic PM Domain Node ==
+
+Required property:
+ - Below property should be in zynqmp-firmware node.
+ - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.
+
+Power domain ID indexes are mentioned in
+include/dt-bindings/power/xlnx-zynqmp-power.h.
+
+-------
+Example
+-------
+
+firmware {
+ zynqmp_firmware: zynqmp-firmware {
+ ...
+ #power-domain-cells = <1>;
+ ...
+ };
+};
+
+sata {
+ ...
+ power-domains = <&zynqmp_firmware 2>;
+ ...
+};
diff --git a/include/dt-bindings/power/xlnx-zynqmp-power.h b/include/dt-bindings/power/xlnx-zynqmp-power.h
new file mode 100644
index 000000000000..1bc9636098ca
--- /dev/null
+++ b/include/dt-bindings/power/xlnx-zynqmp-power.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#ifndef _DT_BINDINGS_ZYNQMP_POWER_H
+#define _DT_BINDINGS_ZYNQMP_POWER_H
+
+#define PD_USB_0 0
+#define PD_USB_1 1
+#define PD_SATA 2
+#define PD_SPI_0 3
+#define PD_SPI_1 4
+#define PD_UART_0 5
+#define PD_UART_1 6
+#define PD_ETH_0 7
+#define PD_ETH_1 8
+#define PD_ETH_2 9
+#define PD_ETH_3 10
+#define PD_I2C_0 11
+#define PD_I2C_1 12
+#define PD_DP 13
+#define PD_GDMA 14
+#define PD_ADMA 15
+#define PD_TTC_0 16
+#define PD_TTC_1 17
+#define PD_TTC_2 18
+#define PD_TTC_3 19
+#define PD_SD_0 20
+#define PD_SD_1 21
+#define PD_NAND 22
+#define PD_QSPI 23
+#define PD_GPIO 24
+#define PD_CAN_0 25
+#define PD_CAN_1 26
+#define PD_PCIE 27
+#define PD_GPU 28
+
+#endif
--
2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Nava kishore Manne <nava.manne@xilinx.com>
To: <atull@kernel.org>, <mdf@kernel.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <michal.simek@xilinx.com>,
<rajanv@xilinx.com>, <jollys@xilinx.com>, <nava.manne@xilinx.com>,
<linux-fpga@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <chinnikishore369@gmail.com>
Cc: Rajan Vaja <rajan.vaja@xilinx.com>
Subject: [PATCH v4 1/6] dt-bindings: power: Add ZynqMP power domain bindings
Date: Thu, 14 Mar 2019 19:31:17 +0530 [thread overview]
Message-ID: <20190314140122.23372-2-nava.manne@xilinx.com> (raw)
In-Reply-To: <20190314140122.23372-1-nava.manne@xilinx.com>
From: Rajan Vaja <rajan.vaja@xilinx.com>
Add documentation to describe ZynqMP power domain bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/power/xlnx,zynqmp-genpd.txt | 34 ++++++++++++++++
include/dt-bindings/power/xlnx-zynqmp-power.h | 39 +++++++++++++++++++
2 files changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
create mode 100644 include/dt-bindings/power/xlnx-zynqmp-power.h
diff --git a/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
new file mode 100644
index 000000000000..3c7f2378e146
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
@@ -0,0 +1,34 @@
+-----------------------------------------------------------
+Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
+-----------------------------------------------------------
+The binding for zynqmp-power-controller follow the common
+generic PM domain binding[1].
+
+[1] Documentation/devicetree/bindings/power/power_domain.txt
+
+== Zynq MPSoC Generic PM Domain Node ==
+
+Required property:
+ - Below property should be in zynqmp-firmware node.
+ - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.
+
+Power domain ID indexes are mentioned in
+include/dt-bindings/power/xlnx-zynqmp-power.h.
+
+-------
+Example
+-------
+
+firmware {
+ zynqmp_firmware: zynqmp-firmware {
+ ...
+ #power-domain-cells = <1>;
+ ...
+ };
+};
+
+sata {
+ ...
+ power-domains = <&zynqmp_firmware 2>;
+ ...
+};
diff --git a/include/dt-bindings/power/xlnx-zynqmp-power.h b/include/dt-bindings/power/xlnx-zynqmp-power.h
new file mode 100644
index 000000000000..1bc9636098ca
--- /dev/null
+++ b/include/dt-bindings/power/xlnx-zynqmp-power.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#ifndef _DT_BINDINGS_ZYNQMP_POWER_H
+#define _DT_BINDINGS_ZYNQMP_POWER_H
+
+#define PD_USB_0 0
+#define PD_USB_1 1
+#define PD_SATA 2
+#define PD_SPI_0 3
+#define PD_SPI_1 4
+#define PD_UART_0 5
+#define PD_UART_1 6
+#define PD_ETH_0 7
+#define PD_ETH_1 8
+#define PD_ETH_2 9
+#define PD_ETH_3 10
+#define PD_I2C_0 11
+#define PD_I2C_1 12
+#define PD_DP 13
+#define PD_GDMA 14
+#define PD_ADMA 15
+#define PD_TTC_0 16
+#define PD_TTC_1 17
+#define PD_TTC_2 18
+#define PD_TTC_3 19
+#define PD_SD_0 20
+#define PD_SD_1 21
+#define PD_NAND 22
+#define PD_QSPI 23
+#define PD_GPIO 24
+#define PD_CAN_0 25
+#define PD_CAN_1 26
+#define PD_PCIE 27
+#define PD_GPU 28
+
+#endif
--
2.18.0
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next prev parent reply other threads:[~2019-03-14 14:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-14 14:01 [PATCH v4 0/6]dt-bindings: Firmware node binding for ZynqMP core Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne [this message]
2019-03-14 14:01 ` [PATCH v4 1/6] dt-bindings: power: Add ZynqMP power domain bindings Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` [PATCH v4 2/6] dt-bindings: soc: Add ZynqMP PM bindings Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` [PATCH v4 3/6] dt-bindings: reset: Add bindings for ZynqMP reset driver Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` [PATCH v4 4/6] dt-bindings: pinctrl: Add ZynqMP pin controller bindings Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` [PATCH v4 5/6] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` [PATCH v4 6/6] dt-bindings: fpga: Add bindings for ZynqMP fpga driver Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-14 14:01 ` Nava kishore Manne
2019-03-22 7:16 ` Nava kishore Manne
2019-03-22 7:16 ` Nava kishore Manne
2019-03-22 7:16 ` Nava kishore Manne
2019-03-25 19:18 ` Rob Herring
2019-03-25 19:18 ` Rob Herring
2019-03-26 14:06 ` Nava kishore Manne
2019-03-26 14:06 ` Nava kishore Manne
2019-03-26 14:06 ` Nava kishore Manne
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