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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Murali Karicheri <m-karicheri2@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-arm-kernel@axis.com>,
	Minghuan Lian <minghuan.Lian@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>
Subject: [PATCH v3 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x
Date: Mon, 25 Mar 2019 15:09:46 +0530	[thread overview]
Message-ID: <20190325093947.32633-26-kishon@ti.com> (raw)
In-Reply-To: <20190325093947.32633-1-kishon@ti.com>

TI's AM654x PCIe EP has a restriction that BAR_0 is mapped to
application registers. "PCIe Inbound Address Translation" section in
AM65x Sitara Processors TRM (SPRUID7 – April 2018) describes BAR0 is
reserved. Configure pci_endpoint_test to use BAR_2 instead.
Also set alignment to 64K since "PCIe Subsystem Address Translation"
section in TRM indicates minimum ATU window size is 64K.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/misc/pci_endpoint_test.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
index 29582fe57151..e015e8fa9bd3 100644
--- a/drivers/misc/pci_endpoint_test.c
+++ b/drivers/misc/pci_endpoint_test.c
@@ -75,6 +75,11 @@
 #define PCI_ENDPOINT_TEST_IRQ_TYPE		0x24
 #define PCI_ENDPOINT_TEST_IRQ_NUMBER		0x28
 
+#define PCI_DEVICE_ID_TI_AM654			0xb00c
+
+#define is_am654_pci_dev(pdev)		\
+		((pdev)->device == PCI_DEVICE_ID_TI_AM654)
+
 static DEFINE_IDA(pci_endpoint_test_ida);
 
 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
@@ -588,6 +593,7 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
 	int ret = -EINVAL;
 	enum pci_barno bar;
 	struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
+	struct pci_dev *pdev = test->pdev;
 
 	mutex_lock(&test->mutex);
 	switch (cmd) {
@@ -595,6 +601,8 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
 		bar = arg;
 		if (bar < 0 || bar > 5)
 			goto ret;
+		if (is_am654_pci_dev(pdev) && bar == BAR_0)
+			goto ret;
 		ret = pci_endpoint_test_bar(test, bar);
 		break;
 	case PCITEST_LEGACY_IRQ:
@@ -785,11 +793,20 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev)
 	pci_disable_device(pdev);
 }
 
+static const struct pci_endpoint_test_data am654_data = {
+	.test_reg_bar = BAR_2,
+	.alignment = SZ_64K,
+	.irq_type = IRQ_TYPE_MSI,
+};
+
 static const struct pci_device_id pci_endpoint_test_tbl[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 0xedda) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
+	  .driver_data = (kernel_ulong_t)&am654_data
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Murali Karicheri <m-karicheri2@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-arm-kernel@axis.com,
	Minghuan Lian <minghuan.Lian@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>
Subject: [PATCH v3 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x
Date: Mon, 25 Mar 2019 15:09:46 +0530	[thread overview]
Message-ID: <20190325093947.32633-26-kishon@ti.com> (raw)
In-Reply-To: <20190325093947.32633-1-kishon@ti.com>

TI's AM654x PCIe EP has a restriction that BAR_0 is mapped to
application registers. "PCIe Inbound Address Translation" section in
AM65x Sitara Processors TRM (SPRUID7 – April 2018) describes BAR0 is
reserved. Configure pci_endpoint_test to use BAR_2 instead.
Also set alignment to 64K since "PCIe Subsystem Address Translation"
section in TRM indicates minimum ATU window size is 64K.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/misc/pci_endpoint_test.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
index 29582fe57151..e015e8fa9bd3 100644
--- a/drivers/misc/pci_endpoint_test.c
+++ b/drivers/misc/pci_endpoint_test.c
@@ -75,6 +75,11 @@
 #define PCI_ENDPOINT_TEST_IRQ_TYPE		0x24
 #define PCI_ENDPOINT_TEST_IRQ_NUMBER		0x28
 
+#define PCI_DEVICE_ID_TI_AM654			0xb00c
+
+#define is_am654_pci_dev(pdev)		\
+		((pdev)->device == PCI_DEVICE_ID_TI_AM654)
+
 static DEFINE_IDA(pci_endpoint_test_ida);
 
 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
@@ -588,6 +593,7 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
 	int ret = -EINVAL;
 	enum pci_barno bar;
 	struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
+	struct pci_dev *pdev = test->pdev;
 
 	mutex_lock(&test->mutex);
 	switch (cmd) {
@@ -595,6 +601,8 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
 		bar = arg;
 		if (bar < 0 || bar > 5)
 			goto ret;
+		if (is_am654_pci_dev(pdev) && bar == BAR_0)
+			goto ret;
 		ret = pci_endpoint_test_bar(test, bar);
 		break;
 	case PCITEST_LEGACY_IRQ:
@@ -785,11 +793,20 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev)
 	pci_disable_device(pdev);
 }
 
+static const struct pci_endpoint_test_data am654_data = {
+	.test_reg_bar = BAR_2,
+	.alignment = SZ_64K,
+	.irq_type = IRQ_TYPE_MSI,
+};
+
 static const struct pci_device_id pci_endpoint_test_tbl[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 0xedda) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
+	  .driver_data = (kernel_ulong_t)&am654_data
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
-- 
2.17.1

WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Murali Karicheri <m-karicheri2@ti.com>
Cc: devicetree@vger.kernel.org,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jingoo Han <jingoohan1@gmail.com>,
	linux-kernel@vger.kernel.org, linux-arm-kernel@axis.com,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Minghuan Lian <minghuan.Lian@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>,
	linux-pci@vger.kernel.org, linux-omap@vger.kernel.org,
	Roy Zang <roy.zang@nxp.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x
Date: Mon, 25 Mar 2019 15:09:46 +0530	[thread overview]
Message-ID: <20190325093947.32633-26-kishon@ti.com> (raw)
In-Reply-To: <20190325093947.32633-1-kishon@ti.com>

TI's AM654x PCIe EP has a restriction that BAR_0 is mapped to
application registers. "PCIe Inbound Address Translation" section in
AM65x Sitara Processors TRM (SPRUID7 – April 2018) describes BAR0 is
reserved. Configure pci_endpoint_test to use BAR_2 instead.
Also set alignment to 64K since "PCIe Subsystem Address Translation"
section in TRM indicates minimum ATU window size is 64K.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/misc/pci_endpoint_test.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
index 29582fe57151..e015e8fa9bd3 100644
--- a/drivers/misc/pci_endpoint_test.c
+++ b/drivers/misc/pci_endpoint_test.c
@@ -75,6 +75,11 @@
 #define PCI_ENDPOINT_TEST_IRQ_TYPE		0x24
 #define PCI_ENDPOINT_TEST_IRQ_NUMBER		0x28
 
+#define PCI_DEVICE_ID_TI_AM654			0xb00c
+
+#define is_am654_pci_dev(pdev)		\
+		((pdev)->device == PCI_DEVICE_ID_TI_AM654)
+
 static DEFINE_IDA(pci_endpoint_test_ida);
 
 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
@@ -588,6 +593,7 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
 	int ret = -EINVAL;
 	enum pci_barno bar;
 	struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
+	struct pci_dev *pdev = test->pdev;
 
 	mutex_lock(&test->mutex);
 	switch (cmd) {
@@ -595,6 +601,8 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
 		bar = arg;
 		if (bar < 0 || bar > 5)
 			goto ret;
+		if (is_am654_pci_dev(pdev) && bar == BAR_0)
+			goto ret;
 		ret = pci_endpoint_test_bar(test, bar);
 		break;
 	case PCITEST_LEGACY_IRQ:
@@ -785,11 +793,20 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev)
 	pci_disable_device(pdev);
 }
 
+static const struct pci_endpoint_test_data am654_data = {
+	.test_reg_bar = BAR_2,
+	.alignment = SZ_64K,
+	.irq_type = IRQ_TYPE_MSI,
+};
+
 static const struct pci_device_id pci_endpoint_test_tbl[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 0xedda) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
+	  .driver_data = (kernel_ulong_t)&am654_data
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
-- 
2.17.1


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-03-25  9:44 UTC|newest]

Thread overview: 139+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-25  9:39 [PATCH v3 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Kishon Vijay Abraham I
2019-03-25  9:39 ` Kishon Vijay Abraham I
2019-03-25  9:39 ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 01/26] PCI: keystone: Add start_link/stop_link dw_pcie_ops Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 02/26] PCI: keystone: Cleanup error_irq configuration Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-13 14:03   ` Bjorn Helgaas
2019-04-13 14:03     ` Bjorn Helgaas
2019-04-15  5:28     ` Kishon Vijay Abraham I
2019-04-15  5:28       ` Kishon Vijay Abraham I
2019-04-15  5:28       ` Kishon Vijay Abraham I
2019-04-13 14:07   ` Bjorn Helgaas
2019-04-13 14:07     ` Bjorn Helgaas
2019-03-25  9:39 ` [PATCH v3 03/26] dt-bindings: PCI: keystone: Add "reg-names" binding information Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 04/26] PCI: keystone: Perform host initialization in a single function Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 05/26] PCI: keystone: Use platform_get_resource_byname to get memory resources Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 06/26] PCI: keystone: Move initializations to appropriate places Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 07/26] dt-bindings: PCI: Add dt-binding to configure PCIe mode Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 08/26] PCI: keystone: Explicitly set the " Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 09/26] dt-bindings: PCI: Document "atu" reg-names Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 10/26] PCI: dwc: Enable iATU unroll for endpoint too Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 11/26] PCI: dwc: Fix ATU identification for designware version >= 4.80 Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 12/26] PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-11 15:03   ` Lorenzo Pieralisi
2019-04-11 15:03     ` Lorenzo Pieralisi
2019-04-12  8:50     ` Kishon Vijay Abraham I
2019-04-12  8:50       ` Kishon Vijay Abraham I
2019-04-12  8:50       ` Kishon Vijay Abraham I
2019-04-12  9:31       ` Russell King - ARM Linux admin
2019-04-12  9:31         ` Russell King - ARM Linux admin
2019-04-12 11:02         ` Kishon Vijay Abraham I
2019-04-12 11:02           ` Kishon Vijay Abraham I
2019-04-12 11:02           ` Kishon Vijay Abraham I
2019-04-12 11:11       ` Lorenzo Pieralisi
2019-04-12 11:11         ` Lorenzo Pieralisi
2019-04-12 11:29         ` Kishon Vijay Abraham I
2019-04-12 11:29           ` Kishon Vijay Abraham I
2019-04-12 11:29           ` Kishon Vijay Abraham I
2019-04-12 11:48           ` Lorenzo Pieralisi
2019-04-12 11:48             ` Lorenzo Pieralisi
2019-03-25  9:39 ` [PATCH v3 13/26] dt-bindings: PCI: Add PCI RC dt binding documentation for AM654 Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 14/26] PCI: keystone: Add support for PCIe RC in AM654x Platforms Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-13 15:26   ` Bjorn Helgaas
2019-04-13 15:26     ` Bjorn Helgaas
2019-04-16 14:15     ` Lorenzo Pieralisi
2019-04-16 14:15       ` Lorenzo Pieralisi
2019-04-17 13:06       ` Kishon Vijay Abraham I
2019-04-17 13:06         ` Kishon Vijay Abraham I
2019-04-17 13:06         ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 15/26] PCI: keystone: Invoke phy_reset API before enabling PHY Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 16/26] PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-11 15:00   ` Lorenzo Pieralisi
2019-04-11 15:00     ` Lorenzo Pieralisi
2019-04-12 14:05   ` Bjorn Helgaas
2019-04-12 14:05     ` Bjorn Helgaas
2019-03-25  9:39 ` [PATCH v3 17/26] PCI: keystone: Add support to set the max link speed from DT Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 18/26] PCI: endpoint: Add support to allocate aligned buffers to be mapped in BARs Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-11 15:32   ` Lorenzo Pieralisi
2019-04-11 15:32     ` Lorenzo Pieralisi
2019-04-12 10:37     ` Kishon Vijay Abraham I
2019-04-12 10:37       ` Kishon Vijay Abraham I
2019-04-12 10:37       ` Kishon Vijay Abraham I
2019-04-12 10:55       ` Lorenzo Pieralisi
2019-04-12 10:55         ` Lorenzo Pieralisi
2019-03-25  9:39 ` [PATCH v3 19/26] PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 20/26] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-13 15:44   ` Bjorn Helgaas
2019-04-13 15:44     ` Bjorn Helgaas
2019-04-16 14:11     ` Lorenzo Pieralisi
2019-04-16 14:11       ` Lorenzo Pieralisi
2019-03-25  9:39 ` [PATCH v3 21/26] PCI: dwc: Add callbacks for accessing dbi2 address space Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 22/26] PCI: keystone: Add support for PCIe EP in AM654x Platforms Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-26  9:40   ` Lorenzo Pieralisi
2019-04-26  9:40     ` Lorenzo Pieralisi
2019-04-26 12:41     ` Kishon Vijay Abraham I
2019-04-26 12:41       ` Kishon Vijay Abraham I
2019-04-26 12:41       ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 23/26] PCI: designware-ep: Configure RESBAR to advertise the smallest size Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 24/26] PCI: designware-ep: Use aligned ATU window for raising MSI interrupts Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-13 15:58   ` Bjorn Helgaas
2019-04-13 15:58     ` Bjorn Helgaas
2019-04-13 15:58     ` Bjorn Helgaas
2019-03-25  9:39 ` Kishon Vijay Abraham I [this message]
2019-03-25  9:39   ` [PATCH v3 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39 ` [PATCH v3 26/26] misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-03-25  9:39   ` Kishon Vijay Abraham I
2019-04-12 15:48 ` [PATCH v3 00/26] Add support for PCIe RC and EP mode in TI's AM654 SoC Lorenzo Pieralisi
2019-04-12 15:48   ` Lorenzo Pieralisi
2019-04-13 16:04   ` Bjorn Helgaas
2019-04-13 16:04     ` Bjorn Helgaas

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