Re: [PATCH v2 4/4] ARM: dts: sunxi: Improve A33 NAND transfers by using DMA

From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Richard Weinberger <richard@nod.at>,
	Marek Vasut <marek.vasut@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-mtd@lists.infradead.org,
	Brian Norris <computersforpeace@gmail.com>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 4/4] ARM: dts: sunxi: Improve A33 NAND transfers by using DMA
Date: Mon, 8 Apr 2019 10:40:15 +0200	[thread overview]
Message-ID: <20190408084015.6iw74ub5ay6q73v2@flea> (raw)
In-Reply-To: <20190408074147.26797-4-miquel.raynal@bootlin.com>

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On Mon, Apr 08, 2019 at 09:41:47AM +0200, Miquel Raynal wrote:
> In the current state, A33 NAND controllers use PIO during
> transfers. Throughput can be increased thanks to the use of DMA
> (mostly during reads, because of the ECC pipelining feature).
>
> Besides the usual addition of DMA DT properties, because the A33
> NAND DMA handling is different than for older SoCs, we must also
> update the compatible which has recently been introduced for this
> purpose.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Applied, thanks!

The rest is
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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