From: Maxime Ripard <maxime.ripard@bootlin.com> To: Yangtao Li <tiny.windzz@gmail.com> Cc: vireshk@kernel.org, nm@ti.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, rjw@rjwysocki.net, davem@davemloft.net, mchehab+samsung@kernel.org, gregkh@linuxfoundation.org, nicolas.ferre@microchip.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] dt-bindings: cpufreq: Document operating-points-v2-sunxi-cpu Date: Wed, 10 Apr 2019 16:56:59 +0200 [thread overview] Message-ID: <20190410145659.62nl4o2jvkuggmpe@flea> (raw) In-Reply-To: <20190409172558.18778-3-tiny.windzz@gmail.com> [-- Attachment #1: Type: text/plain, Size: 3097 bytes --] On Tue, Apr 09, 2019 at 01:25:58PM -0400, Yangtao Li wrote: > Allwinner Process Voltage Scaling Tables defines the voltage and > frequency value based on the speedbin blown in the efuse combination. > The sunxi-cpufreq-nvmem driver reads the efuse value from the SoC to > provide the OPP framework with required information. > This is used to determine the voltage and frequency value for each > OPP of operating-points-v2 table when it is parsed by the OPP framework. > > The "operating-points-v2-sunxi-cpu" DT extends the "operating-points-v2" > with following parameters: > - nvmem-cells (NVMEM area containig the speedbin information) > - opp-microvolt-<name>: voltage in micro Volts. > At runtime, the platform can pick a <name> and matching > opp-microvolt-<name> property > > Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> > --- > .../bindings/opp/sunxi-nvmem-cpufreq.txt | 166 ++++++++++++++++++ > 1 file changed, 166 insertions(+) > create mode 100644 Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > > diff --git a/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > new file mode 100644 > index 000000000000..c81a2075b974 > --- /dev/null > +++ b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > @@ -0,0 +1,166 @@ > +Allwinner Technologies, Inc. NVMEM CPUFreq and OPP bindings > +=================================== > + > +For some SoCs, the CPU frequency subset and voltage value of each OPP > +varies based on the silicon variant in use. Allwinner Process Voltage > +Scaling Tables defines the voltage and frequency value based on the > +speedbin blown in the efuse combination. The sunxi-cpufreq-nvmem driver > +reads the efuse value from the SoC to provide the OPP framework with > +required information. > + > +Required properties: > +-------------------- > +In 'cpus' nodes: > +- operating-points-v2: Phandle to the operating-points-v2 table to use. > + > +In 'operating-points-v2' table: > +- compatible: Should be > + - 'operating-points-v2-sunxi-cpu'. Vendor-specific compatibles should have the vendor mentionned. Also, even though the H6 is the only SoC so far that has needed this, we can't really assume that it will be the only SoC to use it, or that it will always behave like that. So having something like allwinner,sun50i-h6-operating-points would be great. > +- nvmem-cells: A phandle pointing to a nvmem-cells node representing the > + efuse registers that has information about the > + speedbin that is used to select the right frequency/voltage > + value pair. > + Please refer the for nvmem-cells > + bindings Documentation/devicetree/bindings/nvmem/nvmem.txt > + and also examples below. > + > +In every OPP node: > +- opp-microvolt-<name>: Voltage in micro Volts. > + At runtime, the platform can pick a <name> and > + matching opp-microvolt-<name> property. > + [See: opp.txt] You need to document the valid names here. Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@bootlin.com> To: Yangtao Li <tiny.windzz@gmail.com> Cc: nm@ti.com, mark.rutland@arm.com, linux-pm@vger.kernel.org, sboyd@kernel.org, vireshk@kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, wens@csie.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, gregkh@linuxfoundation.org, mchehab+samsung@kernel.org, davem@davemloft.net, devicetree@vger.kernel.org Subject: Re: [PATCH v2 2/2] dt-bindings: cpufreq: Document operating-points-v2-sunxi-cpu Date: Wed, 10 Apr 2019 16:56:59 +0200 [thread overview] Message-ID: <20190410145659.62nl4o2jvkuggmpe@flea> (raw) In-Reply-To: <20190409172558.18778-3-tiny.windzz@gmail.com> [-- Attachment #1.1: Type: text/plain, Size: 3097 bytes --] On Tue, Apr 09, 2019 at 01:25:58PM -0400, Yangtao Li wrote: > Allwinner Process Voltage Scaling Tables defines the voltage and > frequency value based on the speedbin blown in the efuse combination. > The sunxi-cpufreq-nvmem driver reads the efuse value from the SoC to > provide the OPP framework with required information. > This is used to determine the voltage and frequency value for each > OPP of operating-points-v2 table when it is parsed by the OPP framework. > > The "operating-points-v2-sunxi-cpu" DT extends the "operating-points-v2" > with following parameters: > - nvmem-cells (NVMEM area containig the speedbin information) > - opp-microvolt-<name>: voltage in micro Volts. > At runtime, the platform can pick a <name> and matching > opp-microvolt-<name> property > > Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> > --- > .../bindings/opp/sunxi-nvmem-cpufreq.txt | 166 ++++++++++++++++++ > 1 file changed, 166 insertions(+) > create mode 100644 Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > > diff --git a/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > new file mode 100644 > index 000000000000..c81a2075b974 > --- /dev/null > +++ b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt > @@ -0,0 +1,166 @@ > +Allwinner Technologies, Inc. NVMEM CPUFreq and OPP bindings > +=================================== > + > +For some SoCs, the CPU frequency subset and voltage value of each OPP > +varies based on the silicon variant in use. Allwinner Process Voltage > +Scaling Tables defines the voltage and frequency value based on the > +speedbin blown in the efuse combination. The sunxi-cpufreq-nvmem driver > +reads the efuse value from the SoC to provide the OPP framework with > +required information. > + > +Required properties: > +-------------------- > +In 'cpus' nodes: > +- operating-points-v2: Phandle to the operating-points-v2 table to use. > + > +In 'operating-points-v2' table: > +- compatible: Should be > + - 'operating-points-v2-sunxi-cpu'. Vendor-specific compatibles should have the vendor mentionned. Also, even though the H6 is the only SoC so far that has needed this, we can't really assume that it will be the only SoC to use it, or that it will always behave like that. So having something like allwinner,sun50i-h6-operating-points would be great. > +- nvmem-cells: A phandle pointing to a nvmem-cells node representing the > + efuse registers that has information about the > + speedbin that is used to select the right frequency/voltage > + value pair. > + Please refer the for nvmem-cells > + bindings Documentation/devicetree/bindings/nvmem/nvmem.txt > + and also examples below. > + > +In every OPP node: > +- opp-microvolt-<name>: Voltage in micro Volts. > + At runtime, the platform can pick a <name> and > + matching opp-microvolt-<name> property. > + [See: opp.txt] You need to document the valid names here. Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-04-10 14:57 UTC|newest] Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-04-09 17:25 [PATCH v2 0/2] cpufreq: Add sunxi nvmem based CPU scaling driver Yangtao Li 2019-04-09 17:25 ` Yangtao Li 2019-04-09 17:25 ` [PATCH v2 1/2] " Yangtao Li 2019-04-09 17:25 ` Yangtao Li 2019-04-10 3:24 ` Viresh Kumar 2019-04-10 3:24 ` Viresh Kumar 2019-04-10 3:24 ` Viresh Kumar 2019-04-10 17:44 ` Frank Lee 2019-04-10 17:44 ` Frank Lee 2019-04-09 17:25 ` [PATCH v2 2/2] dt-bindings: cpufreq: Document operating-points-v2-sunxi-cpu Yangtao Li 2019-04-09 17:25 ` Yangtao Li 2019-04-10 3:26 ` Viresh Kumar 2019-04-10 3:26 ` Viresh Kumar 2019-04-10 14:56 ` Maxime Ripard [this message] 2019-04-10 14:56 ` Maxime Ripard 2019-04-10 17:49 ` Frank Lee 2019-04-10 17:49 ` Frank Lee 2019-04-11 7:49 ` Maxime Ripard 2019-04-11 7:49 ` Maxime Ripard
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