From: Chen-Yu Tsai <wens@kernel.org> To: Maxime Ripard <maxime.ripard@bootlin.com>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com> Cc: Chen-Yu Tsai <wens@csie.org>, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/25] clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_* Date: Mon, 20 May 2019 16:04:05 +0800 [thread overview] Message-ID: <20190520080421.12575-10-wens@kernel.org> (raw) In-Reply-To: <20190520080421.12575-1-wens@kernel.org> From: Chen-Yu Tsai <wens@csie.org> With the new clk parenting code and CLK_HW_INIT_* macros, we can reference parents locally via pointers to struct clk_hw or DT clock-names. Convert existing CLK_HW_INIT_* definitions to describe parents using either struct clk_hw pointers or clock-names from the device tree binding. For the AR100, this also allows us to merge the generic AR100 and the A83T specific one, which only differed in the global clock names for their parent clocks. The device tree bindings used the same name specifiers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/clk/sunxi-ng/ccu-sun8i-r.c | 65 ++++++++++++------------------ 1 file changed, 25 insertions(+), 40 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r.c b/drivers/clk/sunxi-ng/ccu-sun8i-r.c index 71feb7b24e8a..a43e8de873d7 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-r.c @@ -25,10 +25,13 @@ #include "ccu-sun8i-r.h" -static const char * const ar100_parents[] = { "osc32k", "osc24M", - "pll-periph0", "iosc" }; -static const char * const a83t_ar100_parents[] = { "osc16M-d512", "osc24M", - "pll-periph0", "iosc" }; +static const struct clk_parent_data ar100_parents[] = { + { .fw_name = "losc" }, + { .fw_name = "hosc" }, + { .fw_name = "pll-periph" }, + { .fw_name = "iosc" }, +}; + static const struct ccu_mux_var_prediv ar100_predivs[] = { { .index = 2, .shift = 8, .width = 5 }, }; @@ -47,31 +50,10 @@ static struct ccu_div ar100_clk = { .common = { .reg = 0x00, .features = CCU_FEATURE_VARIABLE_PREDIV, - .hw.init = CLK_HW_INIT_PARENTS("ar100", - ar100_parents, - &ccu_div_ops, - 0), - }, -}; - -static struct ccu_div a83t_ar100_clk = { - .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), - - .mux = { - .shift = 16, - .width = 2, - - .var_predivs = ar100_predivs, - .n_var_predivs = ARRAY_SIZE(ar100_predivs), - }, - - .common = { - .reg = 0x00, - .features = CCU_FEATURE_VARIABLE_PREDIV, - .hw.init = CLK_HW_INIT_PARENTS("ar100", - a83t_ar100_parents, - &ccu_div_ops, - 0), + .hw.init = CLK_HW_INIT_PARENTS_DATA("ar100", + ar100_parents, + &ccu_div_ops, + 0), }, }; @@ -82,10 +64,10 @@ static struct ccu_div apb0_clk = { .common = { .reg = 0x0c, - .hw.init = CLK_HW_INIT("apb0", - "ahb0", - &ccu_div_ops, - 0), + .hw.init = CLK_HW_INIT_HW("apb0", + &ahb0_clk.hw, + &ccu_div_ops, + 0), }, }; @@ -115,7 +97,10 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(ir_clk, "ir", BIT(31), /* gate */ 0); -static const char *const a83t_r_mod0_parents[] = { "osc16M", "osc24M" }; +static const struct clk_parent_data a83t_r_mod0_parents[] = { + { .fw_name = "iosc" }, + { .fw_name = "hosc" }, +}; static const struct ccu_mux_fixed_prediv a83t_ir_predivs[] = { { .index = 0, .div = 16 }, }; @@ -135,15 +120,15 @@ static struct ccu_mp a83t_ir_clk = { .common = { .reg = 0x54, .features = CCU_FEATURE_VARIABLE_PREDIV, - .hw.init = CLK_HW_INIT_PARENTS("ir", - a83t_r_mod0_parents, - &ccu_mp_ops, - 0), + .hw.init = CLK_HW_INIT_PARENTS_DATA("ir", + a83t_r_mod0_parents, + &ccu_mp_ops, + 0), }, }; static struct ccu_common *sun8i_a83t_r_ccu_clks[] = { - &a83t_ar100_clk.common, + &ar100_clk.common, &a83t_apb0_clk.common, &apb0_pio_clk.common, &apb0_ir_clk.common, @@ -182,7 +167,7 @@ static struct ccu_common *sun50i_a64_r_ccu_clks[] = { static struct clk_hw_onecell_data sun8i_a83t_r_hw_clks = { .hws = { - [CLK_AR100] = &a83t_ar100_clk.common.hw, + [CLK_AR100] = &ar100_clk.common.hw, [CLK_AHB0] = &ahb0_clk.hw, [CLK_APB0] = &a83t_apb0_clk.common.hw, [CLK_APB0_PIO] = &apb0_pio_clk.common.hw, -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens@kernel.org> To: Maxime Ripard <maxime.ripard@bootlin.com>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com> Cc: Chen-Yu Tsai <wens@csie.org>, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/25] clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_* Date: Mon, 20 May 2019 16:04:05 +0800 [thread overview] Message-ID: <20190520080421.12575-10-wens@kernel.org> (raw) In-Reply-To: <20190520080421.12575-1-wens@kernel.org> From: Chen-Yu Tsai <wens@csie.org> With the new clk parenting code and CLK_HW_INIT_* macros, we can reference parents locally via pointers to struct clk_hw or DT clock-names. Convert existing CLK_HW_INIT_* definitions to describe parents using either struct clk_hw pointers or clock-names from the device tree binding. For the AR100, this also allows us to merge the generic AR100 and the A83T specific one, which only differed in the global clock names for their parent clocks. The device tree bindings used the same name specifiers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/clk/sunxi-ng/ccu-sun8i-r.c | 65 ++++++++++++------------------ 1 file changed, 25 insertions(+), 40 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r.c b/drivers/clk/sunxi-ng/ccu-sun8i-r.c index 71feb7b24e8a..a43e8de873d7 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-r.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-r.c @@ -25,10 +25,13 @@ #include "ccu-sun8i-r.h" -static const char * const ar100_parents[] = { "osc32k", "osc24M", - "pll-periph0", "iosc" }; -static const char * const a83t_ar100_parents[] = { "osc16M-d512", "osc24M", - "pll-periph0", "iosc" }; +static const struct clk_parent_data ar100_parents[] = { + { .fw_name = "losc" }, + { .fw_name = "hosc" }, + { .fw_name = "pll-periph" }, + { .fw_name = "iosc" }, +}; + static const struct ccu_mux_var_prediv ar100_predivs[] = { { .index = 2, .shift = 8, .width = 5 }, }; @@ -47,31 +50,10 @@ static struct ccu_div ar100_clk = { .common = { .reg = 0x00, .features = CCU_FEATURE_VARIABLE_PREDIV, - .hw.init = CLK_HW_INIT_PARENTS("ar100", - ar100_parents, - &ccu_div_ops, - 0), - }, -}; - -static struct ccu_div a83t_ar100_clk = { - .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), - - .mux = { - .shift = 16, - .width = 2, - - .var_predivs = ar100_predivs, - .n_var_predivs = ARRAY_SIZE(ar100_predivs), - }, - - .common = { - .reg = 0x00, - .features = CCU_FEATURE_VARIABLE_PREDIV, - .hw.init = CLK_HW_INIT_PARENTS("ar100", - a83t_ar100_parents, - &ccu_div_ops, - 0), + .hw.init = CLK_HW_INIT_PARENTS_DATA("ar100", + ar100_parents, + &ccu_div_ops, + 0), }, }; @@ -82,10 +64,10 @@ static struct ccu_div apb0_clk = { .common = { .reg = 0x0c, - .hw.init = CLK_HW_INIT("apb0", - "ahb0", - &ccu_div_ops, - 0), + .hw.init = CLK_HW_INIT_HW("apb0", + &ahb0_clk.hw, + &ccu_div_ops, + 0), }, }; @@ -115,7 +97,10 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(ir_clk, "ir", BIT(31), /* gate */ 0); -static const char *const a83t_r_mod0_parents[] = { "osc16M", "osc24M" }; +static const struct clk_parent_data a83t_r_mod0_parents[] = { + { .fw_name = "iosc" }, + { .fw_name = "hosc" }, +}; static const struct ccu_mux_fixed_prediv a83t_ir_predivs[] = { { .index = 0, .div = 16 }, }; @@ -135,15 +120,15 @@ static struct ccu_mp a83t_ir_clk = { .common = { .reg = 0x54, .features = CCU_FEATURE_VARIABLE_PREDIV, - .hw.init = CLK_HW_INIT_PARENTS("ir", - a83t_r_mod0_parents, - &ccu_mp_ops, - 0), + .hw.init = CLK_HW_INIT_PARENTS_DATA("ir", + a83t_r_mod0_parents, + &ccu_mp_ops, + 0), }, }; static struct ccu_common *sun8i_a83t_r_ccu_clks[] = { - &a83t_ar100_clk.common, + &ar100_clk.common, &a83t_apb0_clk.common, &apb0_pio_clk.common, &apb0_ir_clk.common, @@ -182,7 +167,7 @@ static struct ccu_common *sun50i_a64_r_ccu_clks[] = { static struct clk_hw_onecell_data sun8i_a83t_r_hw_clks = { .hws = { - [CLK_AR100] = &a83t_ar100_clk.common.hw, + [CLK_AR100] = &ar100_clk.common.hw, [CLK_AHB0] = &ahb0_clk.hw, [CLK_APB0] = &a83t_apb0_clk.common.hw, [CLK_APB0_PIO] = &apb0_pio_clk.common.hw, -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-05-20 8:06 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-05-20 8:03 [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-05-20 8:03 ` [PATCH 01/25] clk: Fix debugfs clk_possible_parents for clks without parent string names Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-06-07 18:14 ` Stephen Boyd 2019-06-07 18:14 ` Stephen Boyd 2019-05-20 8:03 ` [PATCH 02/25] clk: Add CLK_HW_INIT_* macros using .parent_hws Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-06-07 18:17 ` Stephen Boyd 2019-06-07 18:17 ` Stephen Boyd 2019-05-20 8:03 ` [PATCH 03/25] clk: Add CLK_HW_INIT_FW_NAME macro using .fw_name in .parent_data Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 04/25] clk: Add CLK_HW_INIT_PARENT_DATA macro using .parent_data Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 05/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_HW which takes clk_hw pointer as parent Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 06/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_HWS which takes list of struct clk_hw * Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 07/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_FW_NAME for DT clock-names parent Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 08/25] clk: sunxi-ng: switch to of_clk_hw_register() for registering clks Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai [this message] 2019-05-20 8:04 ` [PATCH 09/25] clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_* Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 10/25] clk: sunxi-ng: a10: Use local parent references for CLK_FIXED_FACTOR Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 11/25] clk: sunxi-ng: sun5i: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 12/25] clk: sunxi-ng: a31: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 13/25] clk: sunxi-ng: a23: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 14/25] clk: sunxi-ng: a33: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 15/25] clk: sunxi-ng: h3: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 16/25] clk: sunxi-ng: r40: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 17/25] clk: sunxi-ng: v3s: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 18/25] clk: sunxi-ng: sun8i-r: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 19/25] clk: sunxi-ng: f1c100s: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 20/25] clk: sunxi-ng: a64: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 21/25] clk: sunxi-ng: h6: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 22/25] clk: sunxi-ng: h6-r: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 23/25] clk: sunxi-ng: gate: Add macros for referencing local clock parents Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 24/25] clk: sunxi-ng: a80-usb: Use local parent references for SUNXI_CCU_GATE Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 25/25] clk: sunxi-ng: sun8i-r: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 9:03 ` [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Maxime Ripard 2019-05-20 9:03 ` Maxime Ripard 2019-06-03 16:38 ` Chen-Yu Tsai 2019-06-03 16:38 ` Chen-Yu Tsai 2019-06-07 18:46 ` Stephen Boyd 2019-06-07 18:46 ` Stephen Boyd 2019-06-11 5:34 ` Chen-Yu Tsai 2019-06-11 5:34 ` Chen-Yu Tsai
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