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From: Abel Vesa <abel.vesa@nxp.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Abel Vesa <abelvesa@gmail.com>, Rob Herring <robh+dt@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	Jacky Bai <ping.bai@nxp.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	dl-linux-imx <linux-imx@nxp.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Carlo Caione <ccaione@baylibre.com>
Subject: Re: [RFC 0/2] Add workaround for core wake-up on IPI for i.MX8MQ
Date: Mon, 10 Jun 2019 13:29:11 +0000	[thread overview]
Message-ID: <20190610132910.srd4j2gtidjeppdx@fsr-ub1664-175> (raw)
In-Reply-To: <20190610131921.GB14647@lakrids.cambridge.arm.com>

On 19-06-10 14:19:21, Mark Rutland wrote:
> On Mon, Jun 10, 2019 at 03:13:44PM +0300, Abel Vesa wrote:
> > This is another alternative for the RFC:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F27%2F545&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=d3X0xyWiaotq4VPNW306wdRhsY4TI%2BBjRSABk6vzf%2B8%3D&amp;reserved=0
> > 
> > This new workaround proposal is a little bit more hacky but more contained
> > since everything is done within the irq-imx-gpcv2 driver.
> > 
> > Basically, it 'hijacks' the registered gic_raise_softirq __smp_cross_call
> > handler and registers instead a wrapper which calls in the 'hijacked' 
> > handler, after that calling into EL3 which will take care of the actual
> > wake up. This time, instead of expanding the PSCI ABI, we use a new vendor SIP.
> 
> IIUC from last time [1,2], this erratum affects all interrupts
> targetting teh idle CPU, not just IPIs, so even if the bodge is more
> self-contained, it doesn't really solve the issue, and there are still
> cases where a CPU will not be woken from idle when it should be (e.g.
> upon receipt of an LPI).
> 

Wrong, this erratum does not affect any other type of interrupts, other
than IPIs. That is because all the other interrupts go through GPC,
which means the cores will wake up on any other type (again, other than IPI).

> IIUC, Marc, Lorenzo, and Rafael [1,2,3] all thought that that this was
> not worthwhile. What's changed?

The fact that this is done in the imx-gpcv2 driver and it's not spread
around like the old RFC. Yes, I agree that fixing something like this
from the core subsystems (like cpuidle) or irq-gic-v3 driver is a bad
idea, but this is not the case anymore with this new RFC.

> 
> Thanks,
> Mark.
> 
> [1] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F197&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=cA5UKbFuZHHnk1599lJi2QXCMTKxCJmPPzoBaRhbdCE%3D&amp;reserved=0
> [2] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F203&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=TrWSY3eozWSd0KwZgIprmPazdDno979NqGnVjpdzi50%3D&amp;reserved=0
> [3] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F198&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=ge%2FOXE40T6GSb0x1SmYFXtwLIdyVy1W0Yl0EItKyXNU%3D&amp;reserved=0
> 
> > 
> > I also have the patches ready for TF-A but I'll hold on to them until I see if
> > this has a chance of getting in.
> > 
> > Abel Vesa (2):
> >   irqchip: irq-imx-gpcv2: Add workaround for i.MX8MQ ERR11171
> >   arm64: dts: imx8mq: Add idle states and gpcv2 wake_request broken
> >     property
> > 
> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 20 +++++++++++++++
> >  drivers/irqchip/irq-imx-gpcv2.c           | 42 +++++++++++++++++++++++++++++++
> >  2 files changed, 62 insertions(+)
> > 
> > -- 
> > 2.7.4
> > 

WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@nxp.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jacky Bai <ping.bai@nxp.com>, Carlo Caione <ccaione@baylibre.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Abel Vesa <abelvesa@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	Fabio Estevam <festevam@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [RFC 0/2] Add workaround for core wake-up on IPI for i.MX8MQ
Date: Mon, 10 Jun 2019 13:29:11 +0000	[thread overview]
Message-ID: <20190610132910.srd4j2gtidjeppdx@fsr-ub1664-175> (raw)
In-Reply-To: <20190610131921.GB14647@lakrids.cambridge.arm.com>

On 19-06-10 14:19:21, Mark Rutland wrote:
> On Mon, Jun 10, 2019 at 03:13:44PM +0300, Abel Vesa wrote:
> > This is another alternative for the RFC:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F27%2F545&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=d3X0xyWiaotq4VPNW306wdRhsY4TI%2BBjRSABk6vzf%2B8%3D&amp;reserved=0
> > 
> > This new workaround proposal is a little bit more hacky but more contained
> > since everything is done within the irq-imx-gpcv2 driver.
> > 
> > Basically, it 'hijacks' the registered gic_raise_softirq __smp_cross_call
> > handler and registers instead a wrapper which calls in the 'hijacked' 
> > handler, after that calling into EL3 which will take care of the actual
> > wake up. This time, instead of expanding the PSCI ABI, we use a new vendor SIP.
> 
> IIUC from last time [1,2], this erratum affects all interrupts
> targetting teh idle CPU, not just IPIs, so even if the bodge is more
> self-contained, it doesn't really solve the issue, and there are still
> cases where a CPU will not be woken from idle when it should be (e.g.
> upon receipt of an LPI).
> 

Wrong, this erratum does not affect any other type of interrupts, other
than IPIs. That is because all the other interrupts go through GPC,
which means the cores will wake up on any other type (again, other than IPI).

> IIUC, Marc, Lorenzo, and Rafael [1,2,3] all thought that that this was
> not worthwhile. What's changed?

The fact that this is done in the imx-gpcv2 driver and it's not spread
around like the old RFC. Yes, I agree that fixing something like this
from the core subsystems (like cpuidle) or irq-gic-v3 driver is a bad
idea, but this is not the case anymore with this new RFC.

> 
> Thanks,
> Mark.
> 
> [1] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F197&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=cA5UKbFuZHHnk1599lJi2QXCMTKxCJmPPzoBaRhbdCE%3D&amp;reserved=0
> [2] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F203&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=TrWSY3eozWSd0KwZgIprmPazdDno979NqGnVjpdzi50%3D&amp;reserved=0
> [3] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F198&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=ge%2FOXE40T6GSb0x1SmYFXtwLIdyVy1W0Yl0EItKyXNU%3D&amp;reserved=0
> 
> > 
> > I also have the patches ready for TF-A but I'll hold on to them until I see if
> > this has a chance of getting in.
> > 
> > Abel Vesa (2):
> >   irqchip: irq-imx-gpcv2: Add workaround for i.MX8MQ ERR11171
> >   arm64: dts: imx8mq: Add idle states and gpcv2 wake_request broken
> >     property
> > 
> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 20 +++++++++++++++
> >  drivers/irqchip/irq-imx-gpcv2.c           | 42 +++++++++++++++++++++++++++++++
> >  2 files changed, 62 insertions(+)
> > 
> > -- 
> > 2.7.4
> > 

WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@nxp.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jacky Bai <ping.bai@nxp.com>, Carlo Caione <ccaione@baylibre.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Abel Vesa <abelvesa@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	Fabio Estevam <festevam@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [RFC 0/2] Add workaround for core wake-up on IPI for i.MX8MQ
Date: Mon, 10 Jun 2019 13:29:11 +0000	[thread overview]
Message-ID: <20190610132910.srd4j2gtidjeppdx@fsr-ub1664-175> (raw)
In-Reply-To: <20190610131921.GB14647@lakrids.cambridge.arm.com>

On 19-06-10 14:19:21, Mark Rutland wrote:
> On Mon, Jun 10, 2019 at 03:13:44PM +0300, Abel Vesa wrote:
> > This is another alternative for the RFC:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F27%2F545&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=d3X0xyWiaotq4VPNW306wdRhsY4TI%2BBjRSABk6vzf%2B8%3D&amp;reserved=0
> > 
> > This new workaround proposal is a little bit more hacky but more contained
> > since everything is done within the irq-imx-gpcv2 driver.
> > 
> > Basically, it 'hijacks' the registered gic_raise_softirq __smp_cross_call
> > handler and registers instead a wrapper which calls in the 'hijacked' 
> > handler, after that calling into EL3 which will take care of the actual
> > wake up. This time, instead of expanding the PSCI ABI, we use a new vendor SIP.
> 
> IIUC from last time [1,2], this erratum affects all interrupts
> targetting teh idle CPU, not just IPIs, so even if the bodge is more
> self-contained, it doesn't really solve the issue, and there are still
> cases where a CPU will not be woken from idle when it should be (e.g.
> upon receipt of an LPI).
> 

Wrong, this erratum does not affect any other type of interrupts, other
than IPIs. That is because all the other interrupts go through GPC,
which means the cores will wake up on any other type (again, other than IPI).

> IIUC, Marc, Lorenzo, and Rafael [1,2,3] all thought that that this was
> not worthwhile. What's changed?

The fact that this is done in the imx-gpcv2 driver and it's not spread
around like the old RFC. Yes, I agree that fixing something like this
from the core subsystems (like cpuidle) or irq-gic-v3 driver is a bad
idea, but this is not the case anymore with this new RFC.

> 
> Thanks,
> Mark.
> 
> [1] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F197&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=cA5UKbFuZHHnk1599lJi2QXCMTKxCJmPPzoBaRhbdCE%3D&amp;reserved=0
> [2] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F203&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=TrWSY3eozWSd0KwZgIprmPazdDno979NqGnVjpdzi50%3D&amp;reserved=0
> [3] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2019%2F3%2F28%2F198&amp;data=02%7C01%7Cabel.vesa%40nxp.com%7C05d512f83dfa4d4f52d908d6eda64321%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636957695741584637&amp;sdata=ge%2FOXE40T6GSb0x1SmYFXtwLIdyVy1W0Yl0EItKyXNU%3D&amp;reserved=0
> 
> > 
> > I also have the patches ready for TF-A but I'll hold on to them until I see if
> > this has a chance of getting in.
> > 
> > Abel Vesa (2):
> >   irqchip: irq-imx-gpcv2: Add workaround for i.MX8MQ ERR11171
> >   arm64: dts: imx8mq: Add idle states and gpcv2 wake_request broken
> >     property
> > 
> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 20 +++++++++++++++
> >  drivers/irqchip/irq-imx-gpcv2.c           | 42 +++++++++++++++++++++++++++++++
> >  2 files changed, 62 insertions(+)
> > 
> > -- 
> > 2.7.4
> > 
_______________________________________________
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  reply	other threads:[~2019-06-10 13:29 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-10 12:13 [RFC 0/2] Add workaround for core wake-up on IPI for i.MX8MQ Abel Vesa
2019-06-10 12:13 ` Abel Vesa
2019-06-10 12:13 ` Abel Vesa
2019-06-10 12:13 ` [RFC 1/2] irqchip: irq-imx-gpcv2: Add workaround for i.MX8MQ ERR11171 Abel Vesa
2019-06-10 12:13   ` Abel Vesa
2019-06-10 12:38   ` Leonard Crestez
2019-06-10 12:38     ` Leonard Crestez
2019-06-10 12:38     ` Leonard Crestez
2019-06-10 13:24   ` Marc Zyngier
2019-06-10 13:24     ` Marc Zyngier
2019-06-10 13:38     ` Abel Vesa
2019-06-10 13:38       ` Abel Vesa
2019-06-10 13:38       ` Abel Vesa
2019-06-10 13:51       ` Marc Zyngier
2019-06-10 13:51         ` Marc Zyngier
2019-06-10 13:51         ` Marc Zyngier
2019-06-10 14:12         ` Abel Vesa
2019-06-10 14:12           ` Abel Vesa
2019-06-10 14:12           ` Abel Vesa
2019-06-10 14:28           ` Marc Zyngier
2019-06-10 14:28             ` Marc Zyngier
2019-06-10 14:28             ` Marc Zyngier
2019-06-10 12:13 ` [RFC 2/2] arm64: dts: imx8mq: Add idle states and gpcv2 wake_request broken property Abel Vesa
2019-06-10 12:13   ` Abel Vesa
2019-06-10 13:19 ` [RFC 0/2] Add workaround for core wake-up on IPI for i.MX8MQ Mark Rutland
2019-06-10 13:19   ` Mark Rutland
2019-06-10 13:29   ` Abel Vesa [this message]
2019-06-10 13:29     ` Abel Vesa
2019-06-10 13:29     ` Abel Vesa
2019-06-10 13:39     ` Marc Zyngier
2019-06-10 13:39       ` Marc Zyngier
2019-06-10 13:39       ` Marc Zyngier
2019-06-10 13:55       ` Abel Vesa
2019-06-10 13:55         ` Abel Vesa
2019-06-10 13:55         ` Abel Vesa
2019-06-10 14:07         ` Marc Zyngier
2019-06-10 14:07           ` Marc Zyngier
2019-06-10 14:07           ` Marc Zyngier
2019-06-10 14:32           ` Leonard Crestez
2019-06-10 14:32             ` Leonard Crestez
2019-06-10 14:32             ` Leonard Crestez
2019-06-10 14:52             ` Marc Zyngier
2019-06-10 14:52               ` Marc Zyngier
2019-06-10 14:52               ` Marc Zyngier
2019-06-12  7:14             ` Thomas Gleixner
2019-06-12  7:14               ` Thomas Gleixner
2019-06-12  7:14               ` Thomas Gleixner
2019-06-12  7:35               ` Marc Zyngier
2019-06-12  7:35                 ` Marc Zyngier
2019-06-12  7:35                 ` Marc Zyngier
2019-06-12  7:37                 ` Thomas Gleixner
2019-06-12  7:37                   ` Thomas Gleixner
2019-06-12  7:37                   ` Thomas Gleixner
2019-06-23 11:47 ` Martin Kepplinger
2019-06-23 11:47   ` Martin Kepplinger
2019-06-28  8:54   ` Abel Vesa
2019-06-28  8:54     ` Abel Vesa
2019-06-28  8:54     ` Abel Vesa
2019-07-02  6:47     ` Martin Kepplinger
2019-07-02  6:47       ` Martin Kepplinger
2019-07-02  6:47       ` Martin Kepplinger
2019-07-02 11:33       ` Abel Vesa
2019-07-02 11:33         ` Abel Vesa
2019-07-02 11:33         ` Abel Vesa
2019-07-08  7:54         ` Martin Kepplinger
2019-07-08  7:54           ` Martin Kepplinger
2019-07-08  7:54           ` Martin Kepplinger
2019-07-08 12:20           ` Martin Kepplinger
2019-07-08 12:20             ` Martin Kepplinger
2019-07-08 12:20             ` Martin Kepplinger
2019-10-30  6:11   ` Martin Kepplinger
2019-10-30  6:11     ` Martin Kepplinger
2019-10-30  7:33     ` Martin Kepplinger
2019-10-30  7:33       ` Martin Kepplinger
2019-10-30  8:08     ` Abel Vesa
2019-10-30  8:08       ` Abel Vesa
2019-10-30  8:14       ` Martin Kepplinger
2019-10-30  8:14         ` Martin Kepplinger
2019-11-04  8:49       ` Martin Kepplinger
2019-11-04  8:49         ` Martin Kepplinger
2019-11-04 10:35         ` Abel Vesa
2019-11-04 10:35           ` Abel Vesa
2019-11-06 11:59           ` Martin Kepplinger
2019-11-06 11:59             ` Martin Kepplinger
2019-11-06 22:36             ` Leonard Crestez
2019-11-06 22:36               ` Leonard Crestez
2019-11-08 11:21               ` Martin Kepplinger
2019-11-08 11:21                 ` Martin Kepplinger
2019-11-08 11:50                 ` Abel Vesa
2019-11-08 11:50                   ` Abel Vesa
2019-11-08 14:17                   ` Martin Kepplinger
2019-11-08 14:17                     ` Martin Kepplinger
2019-11-11  7:54                     ` Abel Vesa
2019-11-11  7:54                       ` Abel Vesa
2019-11-25 17:23               ` Martin Kepplinger
2019-11-25 17:23                 ` Martin Kepplinger

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