From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: "Z.q. Hou" <zhiqiang.hou@nxp.com>, bhelgaas@google.com
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
Leo Li <leoyang.li@nxp.com>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will.deacon@arm.com" <will.deacon@arm.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
"M.h. Lian" <minghuan.lian@nxp.com>,
Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: Re: [PATCHv5 16/20] PCI: mobiveil: Add link up condition check
Date: Tue, 11 Jun 2019 18:17:33 +0100 [thread overview]
Message-ID: <20190611171733.GB22836@redmoon> (raw)
In-Reply-To: <20190412083635.33626-17-Zhiqiang.Hou@nxp.com>
NB: Please trim the CC list and keep it to concerned maintainers.
On Fri, Apr 12, 2019 at 08:36:48AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Avoid to issue CFG transactions to link partner when the PCIe
> link is not up.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V5:
> - Corrected the subject.
>
> drivers/pci/controller/pcie-mobiveil.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
> index 621852078caf..1ee3ea2570c0 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -283,6 +283,10 @@ static bool mobiveil_pcie_valid_device(struct pci_bus *bus, unsigned int devfn)
> {
> struct mobiveil_pcie *pcie = bus->sysdata;
>
> + /* If there is no link, then there is no device */
> + if (bus->number > pcie->root_bus_nr && !mobiveil_pcie_link_up(pcie))
I think Bjorn mentioned this a million times already, eg:
https://lore.kernel.org/linux-pci/20190411201535.GS256045@google.com/
this is racy and gives a false sense of robustness. We have code in the
kernel that checks the link but adding more seems silly to me, so I am
inclined to drop this patch.
Lorenzo
> + return false;
> +
> /* Only one device down on each root port */
> if ((bus->number == pcie->root_bus_nr) && (devfn > 0))
> return false;
> --
> 2.17.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: "Z.q. Hou" <zhiqiang.hou@nxp.com>, bhelgaas@google.com
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Xiaowei Bao <xiaowei.bao@nxp.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>,
"will.deacon@arm.com" <will.deacon@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Leo Li <leoyang.li@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
Mingkai Hu <mingkai.hu@nxp.com>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCHv5 16/20] PCI: mobiveil: Add link up condition check
Date: Tue, 11 Jun 2019 18:17:33 +0100 [thread overview]
Message-ID: <20190611171733.GB22836@redmoon> (raw)
In-Reply-To: <20190412083635.33626-17-Zhiqiang.Hou@nxp.com>
NB: Please trim the CC list and keep it to concerned maintainers.
On Fri, Apr 12, 2019 at 08:36:48AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Avoid to issue CFG transactions to link partner when the PCIe
> link is not up.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V5:
> - Corrected the subject.
>
> drivers/pci/controller/pcie-mobiveil.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
> index 621852078caf..1ee3ea2570c0 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -283,6 +283,10 @@ static bool mobiveil_pcie_valid_device(struct pci_bus *bus, unsigned int devfn)
> {
> struct mobiveil_pcie *pcie = bus->sysdata;
>
> + /* If there is no link, then there is no device */
> + if (bus->number > pcie->root_bus_nr && !mobiveil_pcie_link_up(pcie))
I think Bjorn mentioned this a million times already, eg:
https://lore.kernel.org/linux-pci/20190411201535.GS256045@google.com/
this is racy and gives a false sense of robustness. We have code in the
kernel that checks the link but adding more seems silly to me, so I am
inclined to drop this patch.
Lorenzo
> + return false;
> +
> /* Only one device down on each root port */
> if ((bus->number == pcie->root_bus_nr) && (devfn > 0))
> return false;
> --
> 2.17.1
>
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next prev parent reply other threads:[~2019-06-11 17:17 UTC|newest]
Thread overview: 192+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-12 8:35 [PATCHv5 00/20] PCI: mobiveil: fixes for Mobiveil PCIe Host Bridge IP driver Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` [PATCHv5 01/20] PCI: mobiveil: Unify register accessors Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` [PATCHv5 02/20] PCI: mobiveil: Format the code without functionality change Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-07-03 15:10 ` Lorenzo Pieralisi
2019-07-03 15:10 ` Lorenzo Pieralisi
2019-07-03 15:10 ` Lorenzo Pieralisi
2019-07-04 2:41 ` Z.q. Hou
2019-07-04 2:41 ` Z.q. Hou
2019-07-04 2:41 ` Z.q. Hou
2019-07-03 15:19 ` Lorenzo Pieralisi
2019-07-03 15:19 ` Lorenzo Pieralisi
2019-07-03 15:19 ` Lorenzo Pieralisi
2019-07-03 15:24 ` Lorenzo Pieralisi
2019-07-03 15:24 ` Lorenzo Pieralisi
2019-07-03 15:24 ` Lorenzo Pieralisi
2019-07-04 3:00 ` Z.q. Hou
2019-07-04 3:00 ` Z.q. Hou
2019-07-04 10:56 ` Lorenzo Pieralisi
2019-07-04 10:56 ` Lorenzo Pieralisi
2019-07-04 10:56 ` Lorenzo Pieralisi
2019-07-05 2:24 ` Z.q. Hou
2019-07-05 2:24 ` Z.q. Hou
2019-04-12 8:35 ` [PATCHv5 03/20] PCI: mobiveil: Correct the returned error number Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-07-03 14:17 ` Lorenzo Pieralisi
2019-07-03 14:17 ` Lorenzo Pieralisi
2019-07-03 14:17 ` Lorenzo Pieralisi
2019-07-04 2:38 ` Z.q. Hou
2019-07-04 2:38 ` Z.q. Hou
2019-07-04 2:38 ` Z.q. Hou
2019-04-12 8:35 ` [PATCHv5 04/20] PCI: mobiveil: Remove the flag MSI_FLAG_MULTI_PCI_MSI Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-06-11 16:59 ` Lorenzo Pieralisi
2019-06-11 16:59 ` Lorenzo Pieralisi
2019-06-11 16:59 ` Lorenzo Pieralisi
2019-06-11 17:29 ` Marc Zyngier
2019-06-11 17:29 ` Marc Zyngier
2019-06-11 17:29 ` Marc Zyngier
2019-06-12 10:54 ` Lorenzo Pieralisi
2019-06-12 10:54 ` Lorenzo Pieralisi
2019-06-12 10:54 ` Lorenzo Pieralisi
2019-06-12 11:22 ` Marc Zyngier
2019-06-12 11:22 ` Marc Zyngier
2019-06-12 11:22 ` Marc Zyngier
2019-06-12 11:34 ` Z.q. Hou
2019-06-12 11:34 ` Z.q. Hou
2019-06-12 13:08 ` Lorenzo Pieralisi
2019-06-12 13:08 ` Lorenzo Pieralisi
2019-06-12 13:08 ` Lorenzo Pieralisi
2019-06-15 1:30 ` Z.q. Hou
2019-06-15 1:30 ` Z.q. Hou
2019-06-17 9:33 ` Lorenzo Pieralisi
2019-06-17 9:33 ` Lorenzo Pieralisi
2019-06-17 9:33 ` Lorenzo Pieralisi
2019-06-17 10:34 ` Z.q. Hou
2019-06-17 10:34 ` Z.q. Hou
2019-06-17 10:34 ` Z.q. Hou
2019-06-28 11:35 ` Lorenzo Pieralisi
2019-06-28 11:35 ` Lorenzo Pieralisi
2019-06-28 11:35 ` Lorenzo Pieralisi
2019-07-01 10:07 ` Z.q. Hou
2019-07-01 10:07 ` Z.q. Hou
2019-07-01 10:07 ` Z.q. Hou
2019-04-12 8:35 ` [PATCHv5 05/20] PCI: mobiveil: Correct PCI base address in MEM/IO outbound windows Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` [PATCHv5 06/20] PCI: mobiveil: Replace the resource list iteration function Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` [PATCHv5 07/20] PCI: mobiveil: Use WIN_NUM_0 explicitly for CFG outbound window Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-04-12 8:35 ` Z.q. Hou
2019-06-12 15:13 ` Lorenzo Pieralisi
2019-06-12 15:13 ` Lorenzo Pieralisi
2019-06-12 15:13 ` Lorenzo Pieralisi
2019-04-12 8:36 ` [PATCHv5 08/20] PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-06-28 16:02 ` Lorenzo Pieralisi
2019-06-28 16:02 ` Lorenzo Pieralisi
2019-06-28 16:02 ` Lorenzo Pieralisi
2019-07-01 10:18 ` Z.q. Hou
2019-07-01 10:18 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 09/20] PCI: mobiveil: Correct inbound/outbound window setup routines Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-06-28 16:41 ` Lorenzo Pieralisi
2019-06-28 16:41 ` Lorenzo Pieralisi
2019-06-28 16:41 ` Lorenzo Pieralisi
2019-07-01 10:24 ` Z.q. Hou
2019-07-01 10:24 ` Z.q. Hou
2019-07-01 10:24 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 10/20] PCI: mobiveil: Fix the INTx process errors Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-06-12 15:08 ` Lorenzo Pieralisi
2019-06-12 15:08 ` Lorenzo Pieralisi
2019-06-12 15:08 ` Lorenzo Pieralisi
2019-06-14 7:08 ` Karthikeyan Mitran
2019-06-14 7:08 ` Karthikeyan Mitran
2019-06-14 7:08 ` Karthikeyan Mitran
2019-06-14 10:43 ` Lorenzo Pieralisi
2019-06-14 10:43 ` Lorenzo Pieralisi
2019-06-14 10:43 ` Lorenzo Pieralisi
2019-06-19 5:28 ` Karthikeyan Mitran
2019-06-19 5:28 ` Karthikeyan Mitran
2019-06-19 5:28 ` Karthikeyan Mitran
2019-06-19 7:24 ` Z.q. Hou
2019-06-19 7:24 ` Z.q. Hou
2019-06-28 17:05 ` Lorenzo Pieralisi
2019-06-28 17:05 ` Lorenzo Pieralisi
2019-06-28 17:05 ` Lorenzo Pieralisi
2019-07-01 10:27 ` Z.q. Hou
2019-07-01 10:27 ` Z.q. Hou
2019-07-01 10:27 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 11/20] PCI: mobiveil: Correct the fixup of Class Code field Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 12/20] PCI: mobiveil: Move the link up waiting out of mobiveil_host_init() Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 13/20] PCI: mobiveil: Move IRQ chained handler setup out of DT parse Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 14/20] PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 15/20] PCI: mobiveil: Fix the checking of valid device Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 16/20] PCI: mobiveil: Add link up condition check Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-06-11 17:17 ` Lorenzo Pieralisi [this message]
2019-06-11 17:17 ` Lorenzo Pieralisi
2019-06-11 17:17 ` Lorenzo Pieralisi
2019-06-12 11:36 ` Z.q. Hou
2019-06-12 11:36 ` Z.q. Hou
2019-06-12 11:36 ` Z.q. Hou
2019-04-12 8:36 ` [PATCHv5 17/20] PCI: mobiveil: Complete initialization of host even if no PCIe link Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-04-12 8:36 ` Z.q. Hou
2019-06-12 14:34 ` Lorenzo Pieralisi
2019-06-12 14:34 ` Lorenzo Pieralisi
2019-06-12 14:34 ` Lorenzo Pieralisi
2019-06-15 2:34 ` Z.q. Hou
2019-06-15 2:34 ` Z.q. Hou
2019-06-15 2:34 ` Z.q. Hou
2019-04-12 8:37 ` [PATCHv5 18/20] PCI: mobiveil: Disable IB and OB windows set by bootloader Z.q. Hou
2019-04-12 8:37 ` Z.q. Hou
2019-04-12 8:37 ` Z.q. Hou
2019-06-12 16:23 ` Lorenzo Pieralisi
2019-06-12 16:23 ` Lorenzo Pieralisi
2019-06-12 16:23 ` Lorenzo Pieralisi
2019-06-15 5:03 ` Z.q. Hou
2019-06-15 5:03 ` Z.q. Hou
2019-06-17 9:30 ` Lorenzo Pieralisi
2019-06-17 9:30 ` Lorenzo Pieralisi
2019-06-17 9:30 ` Lorenzo Pieralisi
2019-06-17 10:42 ` Z.q. Hou
2019-06-17 10:42 ` Z.q. Hou
2019-06-17 10:42 ` Z.q. Hou
2019-04-12 8:37 ` [PATCHv5 19/20] PCI: mobiveil: Add 8-bit and 16-bit register accessors Z.q. Hou
2019-04-12 8:37 ` Z.q. Hou
2019-04-12 8:37 ` Z.q. Hou
2019-06-12 13:54 ` Lorenzo Pieralisi
2019-06-12 13:54 ` Lorenzo Pieralisi
2019-06-12 13:54 ` Lorenzo Pieralisi
2019-06-15 1:13 ` Z.q. Hou
2019-06-15 1:13 ` Z.q. Hou
2019-06-17 9:29 ` Lorenzo Pieralisi
2019-06-17 9:29 ` Lorenzo Pieralisi
2019-06-17 10:16 ` Z.q. Hou
2019-06-17 10:16 ` Z.q. Hou
2019-06-17 10:16 ` Z.q. Hou
2019-04-12 8:37 ` [PATCHv5 20/20] dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional Z.q. Hou
2019-04-12 8:37 ` Z.q. Hou
2019-04-12 8:37 ` Z.q. Hou
2019-07-03 10:33 ` [PATCHv5 00/20] PCI: mobiveil: fixes for Mobiveil PCIe Host Bridge IP driver Lorenzo Pieralisi
2019-07-03 10:33 ` Lorenzo Pieralisi
2019-07-03 10:33 ` Lorenzo Pieralisi
2019-07-04 2:36 ` Z.q. Hou
2019-07-04 2:36 ` Z.q. Hou
2019-07-04 2:36 ` Z.q. Hou
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