From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: "David Airlie" <airlied@linux.ie>,
"Daniel Vetter" <daniel@ffwll.ch>, "Chen-Yu Tsai" <wens@csie.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
"Bhushan Shah" <bshah@mykolab.com>,
"Vasily Khoruzhick" <anarsoul@gmail.com>, 坚定前行 <powerpan@qq.com>,
"Michael Trimarchi" <michael@amarulasolutions.com>,
linux-amarula <linux-amarula@amarulasolutions.com>,
linux-sunxi <linux-sunxi@googlegroups.com>
Subject: Re: [linux-sunxi] Re: [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes
Date: Wed, 3 Jul 2019 13:51:12 +0200 [thread overview]
Message-ID: <20190703115112.xuiajfbu22w6frri@flea> (raw)
In-Reply-To: <CAMty3ZCBK__VcdNh6xJESjsX7nGrBHxLY3fOWW=5TxOVrwyVXw@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2668 bytes --]
On Tue, Jul 02, 2019 at 09:10:26PM +0530, Jagan Teki wrote:
> On Tue, Jul 2, 2019 at 8:59 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > On Tue, Jul 02, 2019 at 12:30:14AM +0530, Jagan Teki wrote:
> > > On Tue, Jun 25, 2019 at 8:07 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > > > > > > > > > > BSP has tcon_div and dsi_div. dsi_div is dynamic which depends on
> > > > > > > > > > > bpp/lanes and it indeed depends on PLL computation (not tcon_div),
> > > > > > > > > > > anyway I have explained again on this initial link you mentioned.
> > > > > > > > > > > Please have a look and get back.
> > > > > > > > > >
> > > > > > > > > > I'll have a look, thanks.
> > > > > > > > > >
> > > > > > > > > > I've given your patches a try on my setup though, and this patch
> > > > > > > > > > breaks it with vblank timeouts and some horizontal lines that looks
> > > > > > > > > > like what should be displayed, but blinking and on the right of the
> > > > > > > > > > display. The previous ones are fine though.
> > > > > > > > >
> > > > > > > > > Would you please send me the link of panel driver.
> > > > > > > >
> > > > > > > > It's drivers/gpu/drm/panel/panel-ronbo-rb070d30.c
> > > > > > >
> > > > > > > Look like this panel work even w/o any vendor sequence. it's similar
> > > > > > > to the 4-lane panel I have with RGB888, so the dclk div is 6, is it
> > > > > > > working with this divider?
> > > > > >
> > > > > > It works with 4, it doesn't work with 6.
> > > > >
> > > > > Can be the pixel clock with associated timings can make this diff.
> > > > > Would you send me the pixel clock, pll_rate and timings this panel
> > > > > used it from BSP?
> > > >
> > > > This board never had an Allwinner BSP
> > >
> > > Running on BSP would help to understand some clue, anyway would you
> > > send me the the value PLL_MIPI register (devme 0x1c20040) on this
> > > board. I'm trying to understand how it value in your case.
> >
> > I'm sorry, but I'm not going to port a whole BSP on that board,
> > especially for something I haven't been convinced it's the right fix.
>
> Look like a dead lock here, this change has a conclusive evidence from
> BSP (which is AW datasheet or open code to outside world) and it is
> working with A33, A64 and R40 which was tested in 4 different panels
> and I don't understand the reason for not going with this (atleast
> check with respect to BSP).
Because that would take a month or so?
> Please suggest, what I can do further, your suggestion is very
> helpful here.
I already did, and you ignored it. Several times.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: "Bhushan Shah" <bshah@mykolab.com>,
"David Airlie" <airlied@linux.ie>,
linux-sunxi <linux-sunxi@googlegroups.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
坚定前行 <powerpan@qq.com>, "Chen-Yu Tsai" <wens@csie.org>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Michael Trimarchi" <michael@amarulasolutions.com>,
linux-amarula <linux-amarula@amarulasolutions.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [linux-sunxi] Re: [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes
Date: Wed, 3 Jul 2019 13:51:12 +0200 [thread overview]
Message-ID: <20190703115112.xuiajfbu22w6frri@flea> (raw)
In-Reply-To: <CAMty3ZCBK__VcdNh6xJESjsX7nGrBHxLY3fOWW=5TxOVrwyVXw@mail.gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 2668 bytes --]
On Tue, Jul 02, 2019 at 09:10:26PM +0530, Jagan Teki wrote:
> On Tue, Jul 2, 2019 at 8:59 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > On Tue, Jul 02, 2019 at 12:30:14AM +0530, Jagan Teki wrote:
> > > On Tue, Jun 25, 2019 at 8:07 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > > > > > > > > > > BSP has tcon_div and dsi_div. dsi_div is dynamic which depends on
> > > > > > > > > > > bpp/lanes and it indeed depends on PLL computation (not tcon_div),
> > > > > > > > > > > anyway I have explained again on this initial link you mentioned.
> > > > > > > > > > > Please have a look and get back.
> > > > > > > > > >
> > > > > > > > > > I'll have a look, thanks.
> > > > > > > > > >
> > > > > > > > > > I've given your patches a try on my setup though, and this patch
> > > > > > > > > > breaks it with vblank timeouts and some horizontal lines that looks
> > > > > > > > > > like what should be displayed, but blinking and on the right of the
> > > > > > > > > > display. The previous ones are fine though.
> > > > > > > > >
> > > > > > > > > Would you please send me the link of panel driver.
> > > > > > > >
> > > > > > > > It's drivers/gpu/drm/panel/panel-ronbo-rb070d30.c
> > > > > > >
> > > > > > > Look like this panel work even w/o any vendor sequence. it's similar
> > > > > > > to the 4-lane panel I have with RGB888, so the dclk div is 6, is it
> > > > > > > working with this divider?
> > > > > >
> > > > > > It works with 4, it doesn't work with 6.
> > > > >
> > > > > Can be the pixel clock with associated timings can make this diff.
> > > > > Would you send me the pixel clock, pll_rate and timings this panel
> > > > > used it from BSP?
> > > >
> > > > This board never had an Allwinner BSP
> > >
> > > Running on BSP would help to understand some clue, anyway would you
> > > send me the the value PLL_MIPI register (devme 0x1c20040) on this
> > > board. I'm trying to understand how it value in your case.
> >
> > I'm sorry, but I'm not going to port a whole BSP on that board,
> > especially for something I haven't been convinced it's the right fix.
>
> Look like a dead lock here, this change has a conclusive evidence from
> BSP (which is AW datasheet or open code to outside world) and it is
> working with A33, A64 and R40 which was tested in 4 different panels
> and I don't understand the reason for not going with this (atleast
> check with respect to BSP).
Because that would take a month or so?
> Please suggest, what I can do further, your suggestion is very
> helpful here.
I already did, and you ignored it. Several times.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: "Bhushan Shah" <bshah@mykolab.com>,
"David Airlie" <airlied@linux.ie>,
linux-sunxi <linux-sunxi@googlegroups.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
"Vasily Khoruzhick" <anarsoul@gmail.com>, 坚定前行 <powerpan@qq.com>,
"Chen-Yu Tsai" <wens@csie.org>,
"Michael Trimarchi" <michael@amarulasolutions.com>,
linux-amarula <linux-amarula@amarulasolutions.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [linux-sunxi] Re: [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes
Date: Wed, 3 Jul 2019 13:51:12 +0200 [thread overview]
Message-ID: <20190703115112.xuiajfbu22w6frri@flea> (raw)
In-Reply-To: <CAMty3ZCBK__VcdNh6xJESjsX7nGrBHxLY3fOWW=5TxOVrwyVXw@mail.gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 2668 bytes --]
On Tue, Jul 02, 2019 at 09:10:26PM +0530, Jagan Teki wrote:
> On Tue, Jul 2, 2019 at 8:59 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > On Tue, Jul 02, 2019 at 12:30:14AM +0530, Jagan Teki wrote:
> > > On Tue, Jun 25, 2019 at 8:07 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > > > > > > > > > > BSP has tcon_div and dsi_div. dsi_div is dynamic which depends on
> > > > > > > > > > > bpp/lanes and it indeed depends on PLL computation (not tcon_div),
> > > > > > > > > > > anyway I have explained again on this initial link you mentioned.
> > > > > > > > > > > Please have a look and get back.
> > > > > > > > > >
> > > > > > > > > > I'll have a look, thanks.
> > > > > > > > > >
> > > > > > > > > > I've given your patches a try on my setup though, and this patch
> > > > > > > > > > breaks it with vblank timeouts and some horizontal lines that looks
> > > > > > > > > > like what should be displayed, but blinking and on the right of the
> > > > > > > > > > display. The previous ones are fine though.
> > > > > > > > >
> > > > > > > > > Would you please send me the link of panel driver.
> > > > > > > >
> > > > > > > > It's drivers/gpu/drm/panel/panel-ronbo-rb070d30.c
> > > > > > >
> > > > > > > Look like this panel work even w/o any vendor sequence. it's similar
> > > > > > > to the 4-lane panel I have with RGB888, so the dclk div is 6, is it
> > > > > > > working with this divider?
> > > > > >
> > > > > > It works with 4, it doesn't work with 6.
> > > > >
> > > > > Can be the pixel clock with associated timings can make this diff.
> > > > > Would you send me the pixel clock, pll_rate and timings this panel
> > > > > used it from BSP?
> > > >
> > > > This board never had an Allwinner BSP
> > >
> > > Running on BSP would help to understand some clue, anyway would you
> > > send me the the value PLL_MIPI register (devme 0x1c20040) on this
> > > board. I'm trying to understand how it value in your case.
> >
> > I'm sorry, but I'm not going to port a whole BSP on that board,
> > especially for something I haven't been convinced it's the right fix.
>
> Look like a dead lock here, this change has a conclusive evidence from
> BSP (which is AW datasheet or open code to outside world) and it is
> working with A33, A64 and R40 which was tested in 4 different panels
> and I don't understand the reason for not going with this (atleast
> check with respect to BSP).
Because that would take a month or so?
> Please suggest, what I can do further, your suggestion is very
> helpful here.
I already did, and you ignored it. Several times.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
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dri-devel mailing list
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next prev parent reply other threads:[~2019-07-03 11:51 UTC|newest]
Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-20 9:03 [PATCH v10 00/11] drm/sun4i: dsi: Fixes/updates (A33 reworked!) Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` [PATCH v10 01/11] drm/sun4i: dsi: Fix TCON DRQ set bits Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-23 20:34 ` Maxime Ripard
2019-05-23 20:34 ` Maxime Ripard
2019-05-23 20:34 ` Maxime Ripard
2019-05-24 10:18 ` Jagan Teki
2019-05-24 10:18 ` Jagan Teki
2019-05-24 10:18 ` Jagan Teki
2019-05-29 14:54 ` Maxime Ripard
2019-05-29 14:54 ` Maxime Ripard
2019-05-29 18:14 ` Jagan Teki
2019-05-29 18:14 ` Jagan Teki
2019-06-04 10:00 ` Maxime Ripard
2019-06-04 10:00 ` Maxime Ripard
2019-06-05 7:47 ` Jagan Teki
2019-06-05 7:47 ` Jagan Teki
2019-06-05 7:47 ` Jagan Teki
2019-06-13 12:56 ` Maxime Ripard
2019-06-13 12:56 ` Maxime Ripard
2019-06-13 12:56 ` Maxime Ripard
2019-06-14 6:33 ` Jagan Teki
2019-06-14 6:33 ` Jagan Teki
2019-06-14 6:33 ` Jagan Teki
2019-06-14 14:45 ` Maxime Ripard
2019-06-14 14:45 ` Maxime Ripard
2019-06-14 14:45 ` Maxime Ripard
2019-06-18 10:51 ` Jagan Teki
2019-06-18 10:51 ` Jagan Teki
2019-06-18 11:43 ` [linux-sunxi] " Chen-Yu Tsai
2019-06-18 11:43 ` Chen-Yu Tsai
2019-06-18 11:43 ` [linux-sunxi] " Chen-Yu Tsai
2019-06-18 12:11 ` Jagan Teki
2019-06-18 12:11 ` Jagan Teki
2019-06-18 14:45 ` Chen-Yu Tsai
2019-06-18 14:45 ` Chen-Yu Tsai
2019-06-20 18:51 ` Jagan Teki
2019-06-20 18:51 ` Jagan Teki
2019-06-20 18:51 ` Jagan Teki
2019-06-21 3:13 ` Chen-Yu Tsai
2019-06-21 3:13 ` Chen-Yu Tsai
2019-06-21 3:13 ` [linux-sunxi] " Chen-Yu Tsai
2019-05-20 9:03 ` [PATCH v10 02/11] drm/sun4i: dsi: Update start value in video start delay Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-23 20:37 ` Maxime Ripard
2019-05-23 20:37 ` Maxime Ripard
2019-05-24 10:25 ` Jagan Teki
2019-05-24 10:25 ` Jagan Teki
2019-05-30 10:42 ` Maxime Ripard
2019-05-30 10:42 ` Maxime Ripard
2019-05-30 10:42 ` Maxime Ripard
2019-06-13 8:04 ` Jagan Teki
2019-06-13 8:04 ` Jagan Teki
2019-06-13 8:04 ` Jagan Teki
2019-06-14 14:28 ` Maxime Ripard
2019-06-14 14:28 ` Maxime Ripard
2019-06-14 14:28 ` Maxime Ripard
2019-06-18 11:02 ` Jagan Teki
2019-06-18 11:02 ` Jagan Teki
2019-06-24 9:34 ` Chen-Yu Tsai
2019-06-24 9:34 ` Chen-Yu Tsai
2019-06-24 9:34 ` Chen-Yu Tsai
2019-05-20 9:03 ` [PATCH v10 03/11] drm/sun4i: dsi: Fix video start delay computation Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-23 20:38 ` Maxime Ripard
2019-05-23 20:38 ` Maxime Ripard
2019-05-23 20:38 ` Maxime Ripard
2019-05-24 10:26 ` Jagan Teki
2019-05-24 10:26 ` Jagan Teki
2019-06-21 8:35 ` [linux-sunxi] " Chen-Yu Tsai
2019-06-21 8:35 ` Chen-Yu Tsai
2019-06-21 8:35 ` [linux-sunxi] " Chen-Yu Tsai
2019-06-24 8:52 ` Jagan Teki
2019-06-24 8:52 ` Jagan Teki
2019-06-24 8:52 ` Jagan Teki
2019-05-20 9:03 ` [PATCH v10 04/11] drm/sun4i: tcon: Compute DCLK dividers based on format, lanes Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-23 20:48 ` Maxime Ripard
2019-05-23 20:48 ` Maxime Ripard
2019-05-23 20:48 ` Maxime Ripard
2019-05-24 10:07 ` Jagan Teki
2019-05-24 10:07 ` Jagan Teki
2019-06-04 14:30 ` Maxime Ripard
2019-06-04 14:30 ` Maxime Ripard
2019-06-04 14:30 ` Maxime Ripard
2019-06-05 7:41 ` [linux-sunxi] " Jagan Teki
2019-06-05 7:41 ` Jagan Teki
2019-06-05 7:41 ` Jagan Teki
2019-06-13 13:16 ` Maxime Ripard
2019-06-13 13:16 ` Maxime Ripard
2019-06-13 13:16 ` [linux-sunxi] " Maxime Ripard
2019-06-14 12:03 ` Jagan Teki
2019-06-14 12:03 ` Jagan Teki
2019-06-24 13:04 ` Maxime Ripard
2019-06-24 13:04 ` Maxime Ripard
2019-06-24 13:04 ` [linux-sunxi] " Maxime Ripard
2019-06-24 16:02 ` Jagan Teki
2019-06-24 16:02 ` Jagan Teki
2019-06-24 16:02 ` [linux-sunxi] " Jagan Teki
2019-06-25 14:37 ` Maxime Ripard
2019-06-25 14:37 ` Maxime Ripard
2019-06-25 14:37 ` [linux-sunxi] " Maxime Ripard
2019-07-01 19:00 ` Jagan Teki
2019-07-01 19:00 ` Jagan Teki
2019-07-02 15:29 ` Maxime Ripard
2019-07-02 15:29 ` Maxime Ripard
2019-07-02 15:29 ` [linux-sunxi] " Maxime Ripard
2019-07-02 15:40 ` Jagan Teki
2019-07-02 15:40 ` Jagan Teki
2019-07-03 11:51 ` Maxime Ripard [this message]
2019-07-03 11:51 ` Maxime Ripard
2019-07-03 11:51 ` Maxime Ripard
2019-05-20 9:03 ` [PATCH v10 05/11] drm/sun4i: tcon: Export get tcon0 routine Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` [PATCH v10 06/11] drm/sun4i: dsi: Probe tcon0 during dsi_bind Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` [PATCH v10 07/11] drm/sun4i: dsi: Get tcon0_div at runtime Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` [PATCH v10 08/11] dt-bindings: sun6i-dsi: Add VCC-DSI supply property Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` [PATCH v10 09/11] drm/sun4i: sun6i_mipi_dsi: Add VCC-DSI regulator support Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-06-03 13:49 ` Maxime Ripard
2019-06-03 13:49 ` Maxime Ripard
2019-06-03 13:49 ` Maxime Ripard
2019-06-13 7:55 ` Jagan Teki
2019-06-13 7:55 ` Jagan Teki
2019-06-13 7:55 ` Jagan Teki
2019-06-13 13:14 ` Maxime Ripard
2019-06-13 13:14 ` Maxime Ripard
2019-06-13 13:14 ` Maxime Ripard
2019-05-20 9:03 ` [DO NOT MERGE] [PATCH v10 10/11] drm/panel: Add Bananapi S070WV20-CT16 ICN6211 MIPI-DSI to RGB bridge Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` [DO NOT MERGE] [PATCH v10 11/11] ARM: dts: sun8i: bananapi-m2m: Enable Bananapi S070WV20-CT16 DSI panel Jagan Teki
2019-05-20 9:03 ` Jagan Teki
2019-05-20 9:03 ` Jagan Teki
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