From: Andrew Jeffery <andrew@aj.id.au> To: linux-mmc@vger.kernel.org Cc: Andrew Jeffery <andrew@aj.id.au>, ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, joel@jms.id.au, adrian.hunter@intel.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, ryanchen.aspeed@gmail.com Subject: [PATCH 1/2] dt-bindings: mmc: Document Aspeed SD controller Date: Wed, 10 Jul 2019 23:46:10 +0930 [thread overview] Message-ID: <20190710141611.21159-2-andrew@aj.id.au> (raw) In-Reply-To: <20190710141611.21159-1-andrew@aj.id.au> The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if only a single slot is enabled. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- .../bindings/mmc/sdhci-of-aspeed.yaml | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml diff --git a/Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml b/Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml new file mode 100644 index 000000000000..e98a2ac4d46d --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/sdhci-of-aspeed.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED SD/SDIO/eMMC Controller + +maintainers: + - Andrew Jeffery <andrew@aj.id.au> + - Ryan Chen <ryanchen.aspeed@gmail.com> + +description: |+ + The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO + Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if + only a single slot is enabled. + + The two slots are supported by a common configuration area. As the SDHCIs for + the slots are dependent on the common configuration area, they are described + as child nodes. + +properties: + compatible: + enum: [ aspeed,ast2400-sdc, aspeed,ast2500-sdc ] + reg: + description: Common configuration registers + ranges: true + clocks: + maxItems: 1 + description: The SD/SDIO controller clock gate + sdhci: + type: object + properties: + compatible: + allOf: + - enum: [ aspeed,ast2400-sdhci, aspeed,ast2500-sdhci ] + - const: sdhci + reg: + description: The SDHCI registers + clocks: + maxItems: 1 + description: The SD bus clock + slot: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + interrupts: + maxItems: 1 + description: The SD interrupt shared between both slots + required: + - compatible + - reg + - clocks + - slot + - interrupts + +required: + - compatible + - reg + - ranges + - clocks + +examples: + - | + #include <dt-bindings/clock/aspeed-clock.h> + sdc@1e740000 { + compatible = "aspeed,ast2500-sdc"; + reg = <0x1e740000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; + + sdhci0: sdhci@1e740100 { + compatible = "aspeed,ast2500-sdhci", "sdhci"; + reg = <0x1e740100 0x100>; + slot = <0>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + + sdhci1: sdhci@1e740200 { + compatible = "aspeed,ast2500-sdhci", "sdhci"; + reg = <0x1e740200 0x100>; + slot = <1>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + }; -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jeffery <andrew@aj.id.au> To: linux-mmc@vger.kernel.org Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, ulf.hansson@linaro.org, linux-aspeed@lists.ozlabs.org, Andrew Jeffery <andrew@aj.id.au>, ryanchen.aspeed@gmail.com, adrian.hunter@intel.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] dt-bindings: mmc: Document Aspeed SD controller Date: Wed, 10 Jul 2019 23:46:10 +0930 [thread overview] Message-ID: <20190710141611.21159-2-andrew@aj.id.au> (raw) In-Reply-To: <20190710141611.21159-1-andrew@aj.id.au> The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if only a single slot is enabled. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- .../bindings/mmc/sdhci-of-aspeed.yaml | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml diff --git a/Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml b/Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml new file mode 100644 index 000000000000..e98a2ac4d46d --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-of-aspeed.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/sdhci-of-aspeed.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED SD/SDIO/eMMC Controller + +maintainers: + - Andrew Jeffery <andrew@aj.id.au> + - Ryan Chen <ryanchen.aspeed@gmail.com> + +description: |+ + The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO + Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if + only a single slot is enabled. + + The two slots are supported by a common configuration area. As the SDHCIs for + the slots are dependent on the common configuration area, they are described + as child nodes. + +properties: + compatible: + enum: [ aspeed,ast2400-sdc, aspeed,ast2500-sdc ] + reg: + description: Common configuration registers + ranges: true + clocks: + maxItems: 1 + description: The SD/SDIO controller clock gate + sdhci: + type: object + properties: + compatible: + allOf: + - enum: [ aspeed,ast2400-sdhci, aspeed,ast2500-sdhci ] + - const: sdhci + reg: + description: The SDHCI registers + clocks: + maxItems: 1 + description: The SD bus clock + slot: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + interrupts: + maxItems: 1 + description: The SD interrupt shared between both slots + required: + - compatible + - reg + - clocks + - slot + - interrupts + +required: + - compatible + - reg + - ranges + - clocks + +examples: + - | + #include <dt-bindings/clock/aspeed-clock.h> + sdc@1e740000 { + compatible = "aspeed,ast2500-sdc"; + reg = <0x1e740000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; + + sdhci0: sdhci@1e740100 { + compatible = "aspeed,ast2500-sdhci", "sdhci"; + reg = <0x1e740100 0x100>; + slot = <0>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + + sdhci1: sdhci@1e740200 { + compatible = "aspeed,ast2500-sdhci", "sdhci"; + reg = <0x1e740200 0x100>; + slot = <1>; + interrupts = <26>; + sdhci,auto-cmd12; + clocks = <&syscon ASPEED_CLK_SDIO>; + }; + }; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-07-10 14:16 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-07-10 14:16 [PATCH 0/2] mmc: Add support for the ASPEED SD controller Andrew Jeffery 2019-07-10 14:16 ` Andrew Jeffery 2019-07-10 14:16 ` Andrew Jeffery [this message] 2019-07-10 14:16 ` [PATCH 1/2] dt-bindings: mmc: Document Aspeed " Andrew Jeffery 2019-07-10 15:49 ` Rob Herring 2019-07-10 15:49 ` Rob Herring 2019-07-10 15:49 ` Rob Herring 2019-07-11 0:56 ` Andrew Jeffery 2019-07-11 0:56 ` Andrew Jeffery 2019-07-11 0:56 ` Andrew Jeffery 2019-07-11 13:44 ` Rob Herring 2019-07-11 13:44 ` Rob Herring 2019-07-11 13:44 ` Rob Herring 2019-07-10 14:16 ` [PATCH 2/2] mmc: Add support for the ASPEED " Andrew Jeffery 2019-07-10 14:16 ` Andrew Jeffery
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