From: Wolfram Sang <wsa@the-dreams.de>
To: Simon Horman <horms+renesas@verge.net.au>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
linux-renesas-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Magnus Damm <magnus.damm@gmail.com>, Andrew Lunn <andrew@lunn.ch>
Subject: Re: [PATCH/RFC repost] arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps
Date: Wed, 17 Jul 2019 15:26:07 +0200 [thread overview]
Message-ID: <20190717132607.GA1458@kunai> (raw)
In-Reply-To: <20190717125739.21450-1-horms+renesas@verge.net.au>
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On Wed, Jul 17, 2019 at 02:57:39PM +0200, Simon Horman wrote:
> * According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
> August 24, 2018, the TX clock internal delay mode isn't supported
> on R-Car E3 (r8a77990) and D3 (r8a77995).
>
> * TX clock internal delay mode is required for reliable 1Gbps communication
> using the KSZ9031RNX phy present on the Ebisu and Draak boards.
>
> Thus, the E3 based Ebisu and D3 based Draak boards reliably use 1Gbps and
> the speed should be limited to 100Mbps.
>
> Based on work by Kazuya Mizuguchi.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
What about adding a short comment explaining the situation?
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WARNING: multiple messages have this Message-ID (diff)
From: Wolfram Sang <wsa@the-dreams.de>
To: Simon Horman <horms+renesas@verge.net.au>
Cc: linux-renesas-soc@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
Magnus Damm <magnus.damm@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: Re: [PATCH/RFC repost] arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps
Date: Wed, 17 Jul 2019 15:26:07 +0200 [thread overview]
Message-ID: <20190717132607.GA1458@kunai> (raw)
In-Reply-To: <20190717125739.21450-1-horms+renesas@verge.net.au>
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On Wed, Jul 17, 2019 at 02:57:39PM +0200, Simon Horman wrote:
> * According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
> August 24, 2018, the TX clock internal delay mode isn't supported
> on R-Car E3 (r8a77990) and D3 (r8a77995).
>
> * TX clock internal delay mode is required for reliable 1Gbps communication
> using the KSZ9031RNX phy present on the Ebisu and Draak boards.
>
> Thus, the E3 based Ebisu and D3 based Draak boards reliably use 1Gbps and
> the speed should be limited to 100Mbps.
>
> Based on work by Kazuya Mizuguchi.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
What about adding a short comment explaining the situation?
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next prev parent reply other threads:[~2019-07-17 13:26 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-17 12:57 [PATCH/RFC repost] arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps Simon Horman
2019-07-17 12:57 ` Simon Horman
2019-07-17 13:24 ` Kieran Bingham
2019-07-17 13:24 ` Kieran Bingham
2019-07-24 10:52 ` Simon Horman
2019-07-24 10:52 ` Simon Horman
2019-07-17 13:26 ` Wolfram Sang [this message]
2019-07-17 13:26 ` Wolfram Sang
2019-07-24 10:52 ` Simon Horman
2019-07-24 10:52 ` Simon Horman
2019-07-24 21:04 ` Wolfram Sang
2019-07-24 21:04 ` Wolfram Sang
2019-07-25 5:57 ` Simon Horman
2019-07-25 5:57 ` Simon Horman
2019-07-25 7:35 ` Wolfram Sang
2019-07-25 7:35 ` Wolfram Sang
2019-07-25 9:51 ` Simon Horman
2019-07-25 9:51 ` Simon Horman
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