All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
To: Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Philipp Tomsich
	<philipp.tomsich-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org,
	Jagan Teki
	<jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>,
	Wadim Egorov <w.egorov-guT5V/WYfQezQB+pC5nmwQ@public.gmane.org>,
	linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org,
	Akash Gajjar <akash-oRp2ZoJdM/RWk0Htik3J/w@public.gmane.org>
Subject: [PATCH 04/15] rockchip: Add common reset reason
Date: Mon, 29 Jul 2019 13:17:00 +0530	[thread overview]
Message-ID: <20190729074711.16988-5-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190729074711.16988-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>

Right now the reset reason supported by rk3288
and which is printing on board late function.

Support the same reset reason for rk3399 as well,
since it is sharing same cru register mark the
code into common area.

Printing reset reason below SoC information would
really help instead of printing in board late call,
so support this as part of cpu_info.

Cc: Wadim Egorov <w.egorov-guT5V/WYfQezQB+pC5nmwQ@public.gmane.org>
Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
 arch/arm/include/asm/arch-rockchip/cru.h      | 12 ++++++
 .../include/asm/arch-rockchip/cru_rk3288.h    | 14 +------
 arch/arm/mach-rockchip/cpu-info.c             | 41 +++++++++++++++++++
 arch/arm/mach-rockchip/rk3288-board.c         | 39 ------------------
 4 files changed, 54 insertions(+), 52 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h
index 3b1a3bae71..b54e21d6f1 100644
--- a/arch/arm/include/asm/arch-rockchip/cru.h
+++ b/arch/arm/include/asm/arch-rockchip/cru.h
@@ -13,4 +13,16 @@
 # include <asm/arch-rockchip/cru_rk3399.h>
 #endif
 
+/* CRU_GLB_RST_ST */
+enum {
+	GLB_POR_RST,
+	FST_GLB_RST_ST		= BIT(0),
+	SND_GLB_RST_ST		= BIT(1),
+	FST_GLB_TSADC_RST_ST	= BIT(2),
+	SND_GLB_TSADC_RST_ST	= BIT(3),
+	FST_GLB_WDT_RST_ST	= BIT(4),
+	SND_GLB_WDT_RST_ST	= BIT(5),
+	GLB_RST_ST_MASK		= GENMASK(5, 0),
+};
+
 #endif /* _ROCKCHIP_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index e891f20b37..7acb1c7208 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -51,7 +51,7 @@ struct rk3288_cru {
 	u32 cru_glb_cnt_th;
 	u32 cru_glb_rst_con;
 	u32 reserved3;
-	u32 cru_glb_rst_st;
+	u32 glb_rst_st;
 	u32 reserved4;
 	u32 cru_sdmmc_con[2];
 	u32 cru_sdio0_con[2];
@@ -227,16 +227,4 @@ enum {
 	CLKF_MASK		= 0x1fff << CLKF_SHIFT,
 };
 
-/* CRU_GLB_RST_ST */
-enum {
-	GLB_POR_RST,
-	FST_GLB_RST_ST		= BIT(0),
-	SND_GLB_RST_ST		= BIT(1),
-	FST_GLB_TSADC_RST_ST	= BIT(2),
-	SND_GLB_TSADC_RST_ST	= BIT(3),
-	FST_GLB_WDT_RST_ST	= BIT(4),
-	SND_GLB_WDT_RST_ST	= BIT(5),
-	GLB_RST_ST_MASK		= GENMASK(5, 0),
-};
-
 #endif
diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
index 088fc806a6..8e56999b05 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -5,6 +5,38 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/cru.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <linux/err.h>
+
+static char *rockchip_reset_reason(unsigned int glb_rst_st)
+{
+	char *reason;
+
+	switch (glb_rst_st) {
+	case GLB_POR_RST:
+		reason = "POR";
+		break;
+	case FST_GLB_RST_ST:
+	case SND_GLB_RST_ST:
+		reason = "RST";
+		break;
+	case FST_GLB_TSADC_RST_ST:
+	case SND_GLB_TSADC_RST_ST:
+		reason = "THERMAL";
+		break;
+	case FST_GLB_WDT_RST_ST:
+	case SND_GLB_WDT_RST_ST:
+		reason = "WDOG";
+		break;
+	default:
+		reason = "unknown reset";
+        }
+
+	return reason;
+}
 
 int print_cpuinfo(void)
 {
@@ -13,12 +45,21 @@ int print_cpuinfo(void)
 	/* TODO print operating temparature and clock */
 # ifdef CONFIG_ROCKCHIP_RK3288
 	puts("RK3288\n");
+	struct rk3288_cru *cru = rockchip_get_cru();
 # elif CONFIG_ROCKCHIP_RK3399
 	puts("RK3399\n");
+	struct rk3399_cru *cru = rockchip_get_cru();
 # else
 # warning Please update cpu.c with correct CPU information
 	puts("Family\n");
 # endif
 
+	if (IS_ERR(cru))
+		return -EINVAL;
+
+	printf("Reset cause: %s\n", rockchip_reset_reason(cru->glb_rst_st));
+
+	rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK);
+
 	return 0;
 }
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 613264d7ee..3e5cd9bad9 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -10,7 +10,6 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/periph.h>
 #include <asm/arch-rockchip/pmu_rk3288.h>
 #include <asm/arch-rockchip/qos_rk3288.h>
@@ -44,48 +43,10 @@ int rk3288_qos_init(void)
 	return 0;
 }
 
-static void rk3288_detect_reset_reason(void)
-{
-	struct rk3288_cru *cru = rockchip_get_cru();
-	const char *reason;
-
-	if (IS_ERR(cru))
-		return;
-
-	switch (cru->cru_glb_rst_st) {
-	case GLB_POR_RST:
-		reason = "POR";
-		break;
-	case FST_GLB_RST_ST:
-	case SND_GLB_RST_ST:
-		reason = "RST";
-		break;
-	case FST_GLB_TSADC_RST_ST:
-	case SND_GLB_TSADC_RST_ST:
-		reason = "THERMAL";
-		break;
-	case FST_GLB_WDT_RST_ST:
-	case SND_GLB_WDT_RST_ST:
-		reason = "WDOG";
-		break;
-	default:
-		reason = "unknown reset";
-	}
-
-	printf("Reset cause: %s\n", reason);
-
-	/*
-	 * Clear cru_glb_rst_st, so we can determine the last reset cause
-	 * for following resets.
-	 */
-	rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK);
-}
-
 int board_late_init(void)
 {
 	setup_boot_mode();
 	rk3288_qos_init();
-	rk3288_detect_reset_reason();
 
 	return rk_board_late_init();
 }
-- 
2.18.0.321.gffc6fa0e3

WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 04/15] rockchip: Add common reset reason
Date: Mon, 29 Jul 2019 13:17:00 +0530	[thread overview]
Message-ID: <20190729074711.16988-5-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190729074711.16988-1-jagan@amarulasolutions.com>

Right now the reset reason supported by rk3288
and which is printing on board late function.

Support the same reset reason for rk3399 as well,
since it is sharing same cru register mark the
code into common area.

Printing reset reason below SoC information would
really help instead of printing in board late call,
so support this as part of cpu_info.

Cc: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm/include/asm/arch-rockchip/cru.h      | 12 ++++++
 .../include/asm/arch-rockchip/cru_rk3288.h    | 14 +------
 arch/arm/mach-rockchip/cpu-info.c             | 41 +++++++++++++++++++
 arch/arm/mach-rockchip/rk3288-board.c         | 39 ------------------
 4 files changed, 54 insertions(+), 52 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h
index 3b1a3bae71..b54e21d6f1 100644
--- a/arch/arm/include/asm/arch-rockchip/cru.h
+++ b/arch/arm/include/asm/arch-rockchip/cru.h
@@ -13,4 +13,16 @@
 # include <asm/arch-rockchip/cru_rk3399.h>
 #endif
 
+/* CRU_GLB_RST_ST */
+enum {
+	GLB_POR_RST,
+	FST_GLB_RST_ST		= BIT(0),
+	SND_GLB_RST_ST		= BIT(1),
+	FST_GLB_TSADC_RST_ST	= BIT(2),
+	SND_GLB_TSADC_RST_ST	= BIT(3),
+	FST_GLB_WDT_RST_ST	= BIT(4),
+	SND_GLB_WDT_RST_ST	= BIT(5),
+	GLB_RST_ST_MASK		= GENMASK(5, 0),
+};
+
 #endif /* _ROCKCHIP_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index e891f20b37..7acb1c7208 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -51,7 +51,7 @@ struct rk3288_cru {
 	u32 cru_glb_cnt_th;
 	u32 cru_glb_rst_con;
 	u32 reserved3;
-	u32 cru_glb_rst_st;
+	u32 glb_rst_st;
 	u32 reserved4;
 	u32 cru_sdmmc_con[2];
 	u32 cru_sdio0_con[2];
@@ -227,16 +227,4 @@ enum {
 	CLKF_MASK		= 0x1fff << CLKF_SHIFT,
 };
 
-/* CRU_GLB_RST_ST */
-enum {
-	GLB_POR_RST,
-	FST_GLB_RST_ST		= BIT(0),
-	SND_GLB_RST_ST		= BIT(1),
-	FST_GLB_TSADC_RST_ST	= BIT(2),
-	SND_GLB_TSADC_RST_ST	= BIT(3),
-	FST_GLB_WDT_RST_ST	= BIT(4),
-	SND_GLB_WDT_RST_ST	= BIT(5),
-	GLB_RST_ST_MASK		= GENMASK(5, 0),
-};
-
 #endif
diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
index 088fc806a6..8e56999b05 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -5,6 +5,38 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/cru.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <linux/err.h>
+
+static char *rockchip_reset_reason(unsigned int glb_rst_st)
+{
+	char *reason;
+
+	switch (glb_rst_st) {
+	case GLB_POR_RST:
+		reason = "POR";
+		break;
+	case FST_GLB_RST_ST:
+	case SND_GLB_RST_ST:
+		reason = "RST";
+		break;
+	case FST_GLB_TSADC_RST_ST:
+	case SND_GLB_TSADC_RST_ST:
+		reason = "THERMAL";
+		break;
+	case FST_GLB_WDT_RST_ST:
+	case SND_GLB_WDT_RST_ST:
+		reason = "WDOG";
+		break;
+	default:
+		reason = "unknown reset";
+        }
+
+	return reason;
+}
 
 int print_cpuinfo(void)
 {
@@ -13,12 +45,21 @@ int print_cpuinfo(void)
 	/* TODO print operating temparature and clock */
 # ifdef CONFIG_ROCKCHIP_RK3288
 	puts("RK3288\n");
+	struct rk3288_cru *cru = rockchip_get_cru();
 # elif CONFIG_ROCKCHIP_RK3399
 	puts("RK3399\n");
+	struct rk3399_cru *cru = rockchip_get_cru();
 # else
 # warning Please update cpu.c with correct CPU information
 	puts("Family\n");
 # endif
 
+	if (IS_ERR(cru))
+		return -EINVAL;
+
+	printf("Reset cause: %s\n", rockchip_reset_reason(cru->glb_rst_st));
+
+	rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK);
+
 	return 0;
 }
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 613264d7ee..3e5cd9bad9 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -10,7 +10,6 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/periph.h>
 #include <asm/arch-rockchip/pmu_rk3288.h>
 #include <asm/arch-rockchip/qos_rk3288.h>
@@ -44,48 +43,10 @@ int rk3288_qos_init(void)
 	return 0;
 }
 
-static void rk3288_detect_reset_reason(void)
-{
-	struct rk3288_cru *cru = rockchip_get_cru();
-	const char *reason;
-
-	if (IS_ERR(cru))
-		return;
-
-	switch (cru->cru_glb_rst_st) {
-	case GLB_POR_RST:
-		reason = "POR";
-		break;
-	case FST_GLB_RST_ST:
-	case SND_GLB_RST_ST:
-		reason = "RST";
-		break;
-	case FST_GLB_TSADC_RST_ST:
-	case SND_GLB_TSADC_RST_ST:
-		reason = "THERMAL";
-		break;
-	case FST_GLB_WDT_RST_ST:
-	case SND_GLB_WDT_RST_ST:
-		reason = "WDOG";
-		break;
-	default:
-		reason = "unknown reset";
-	}
-
-	printf("Reset cause: %s\n", reason);
-
-	/*
-	 * Clear cru_glb_rst_st, so we can determine the last reset cause
-	 * for following resets.
-	 */
-	rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK);
-}
-
 int board_late_init(void)
 {
 	setup_boot_mode();
 	rk3288_qos_init();
-	rk3288_detect_reset_reason();
 
 	return rk_board_late_init();
 }
-- 
2.18.0.321.gffc6fa0e3

  parent reply	other threads:[~2019-07-29  7:47 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-29  7:46 [PATCH 00/15] rk3399: Add redundant boot support Jagan Teki
2019-07-29  7:46 ` [U-Boot] " Jagan Teki
     [not found] ` <20190729074711.16988-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2019-07-29  7:46   ` [PATCH 01/15] arm: rockchip: Add common cru.h Jagan Teki
2019-07-29  7:46     ` [U-Boot] " Jagan Teki
     [not found]     ` <20190729074711.16988-2-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2019-08-05 12:25       ` Kever Yang
2019-08-05 12:25         ` [U-Boot] " Kever Yang
2019-08-25 17:25         ` Jagan Teki
2019-08-25 17:25           ` [U-Boot] " Jagan Teki
2019-07-29  7:46   ` [PATCH 02/15] rockchip: Add cpu-info Jagan Teki
2019-07-29  7:46     ` [U-Boot] " Jagan Teki
     [not found]     ` <20190729074711.16988-3-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2019-08-05 12:27       ` Kever Yang
2019-08-05 12:27         ` [U-Boot] " Kever Yang
2019-07-29  7:46   ` [PATCH 03/15] rockchip: rk3288: Print reset reason Jagan Teki
2019-07-29  7:46     ` [U-Boot] " Jagan Teki
     [not found]     ` <20190729074711.16988-4-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2019-07-29  7:57       ` Matthias Urlichs
2019-08-05 12:30       ` Kever Yang
2019-08-05 12:30         ` [U-Boot] " Kever Yang
     [not found]         ` <98408a3c-84bd-d54b-1b3a-49901c85ba3c-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2019-08-14  9:40           ` Jagan Teki
2019-08-14  9:40             ` [U-Boot] " Jagan Teki
2019-08-14 10:43             ` Wadim Egorov
2019-08-14 10:43               ` [U-Boot] " Wadim Egorov
2019-08-14 10:46               ` Michael Nazzareno Trimarchi
2019-08-14 10:46                 ` [U-Boot] " Michael Nazzareno Trimarchi
2019-07-29  7:47   ` Jagan Teki [this message]
2019-07-29  7:47     ` [U-Boot] [PATCH 04/15] rockchip: Add common " Jagan Teki
2019-07-29  7:47   ` [PATCH 05/15] rockchip: rk3288/rk3399: Enable DISPLAY_CPUINFO Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-08-05 12:35     ` Kever Yang
2019-08-05 12:35       ` [U-Boot] " Kever Yang
2019-07-29  7:47   ` [PATCH 06/15] wdt: designware: Simplify is_enabled function Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-07-29  7:47   ` [PATCH 07/15] wdt: designware: Simplify enable function Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-07-29  7:47   ` [PATCH 08/15] wdt: dw: Add driver-model support Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
     [not found]     ` <20190729074711.16988-9-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2019-07-29  9:09       ` Andy Shevchenko
2019-07-29  9:09         ` Andy Shevchenko
2019-07-29  7:47   ` [PATCH 09/15] wdt: dw: Rename to dw_wdt.c Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-08-05 12:40     ` Kever Yang
2019-08-05 12:40       ` [U-Boot] " Kever Yang
     [not found]       ` <e7507f4e-de8d-e61c-5538-0a3cc203ceba-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2019-08-14  9:44         ` Jagan Teki
2019-08-14  9:44           ` [U-Boot] " Jagan Teki
2019-07-29  7:47   ` [PATCH 10/15] rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for watchdog Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-07-29  7:47   ` [PATCH 11/15] wdt: Kconfig: Add WDT_DW entry Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-07-29  7:47   ` [PATCH 12/15] include: rk3399: Disable watchdog in TPL Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
     [not found]     ` <20190729074711.16988-13-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2019-08-05 12:43       ` Kever Yang
2019-08-05 12:43         ` [U-Boot] " Kever Yang
2019-08-25 20:14         ` Jagan Teki
2019-08-25 20:14           ` [U-Boot] " Jagan Teki
2019-08-26  1:34           ` Kever Yang
2019-08-26  1:34             ` [U-Boot] " Kever Yang
2019-07-29  7:47   ` [DO NOT MERGE] [PATCH 13/15] rk3399: rockpro64: Enable watchdog Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-07-29  7:47   ` [PATCH 14/15] rockchip: rk3399: Add bootcount support Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-08-12 12:16     ` Kever Yang
2019-08-12 12:16       ` [U-Boot] " Kever Yang
2019-08-13  1:02       ` [PATCH 14/15] rockchip: rk3399: Add bootcount support【请注意,邮件由u-boot-bounces@lists.denx.de代发】 Kever Yang
2019-08-13  1:02         ` [U-Boot] " Kever Yang
2019-07-29  7:47   ` [DO NOT MERGE] [PATCH 15/15] rk3399: rockpro64: Enable bootcount Jagan Teki
2019-07-29  7:47     ` [U-Boot] " Jagan Teki
2019-08-05 12:18 ` [PATCH 00/15] rk3399: Add redundant boot support Kever Yang
2019-08-05 12:18   ` [U-Boot] " Kever Yang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190729074711.16988-5-jagan@amarulasolutions.com \
    --to=jagan-dyjbcgdgk7pe9whmmfpqlfatqe2ktcn/@public.gmane.org \
    --cc=akash-oRp2ZoJdM/RWk0Htik3J/w@public.gmane.org \
    --cc=kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org \
    --cc=linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org \
    --cc=linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=philipp.tomsich-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org \
    --cc=sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org \
    --cc=u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org \
    --cc=w.egorov-guT5V/WYfQezQB+pC5nmwQ@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.