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From: Will Deacon <will@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Steve Capper <steve.capper@arm.com>,
	crecklin@redhat.com, Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	bhsharma@redhat.com, maz@kernel.org,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH V5 00/12] 52-bit kernel + user VAs
Date: Tue, 13 Aug 2019 14:10:13 +0100	[thread overview]
Message-ID: <20190813131013.vpc5a2vlxwghizxa@willie-the-truck> (raw)
In-Reply-To: <CAMuHMdWvkWGoNC5HbWoZwtpg5VXxTZqRZqQy4BLPgQXZJtKnsQ@mail.gmail.com>

Hi Geert,

On Tue, Aug 13, 2019 at 02:43:23PM +0200, Geert Uytterhoeven wrote:
> On Fri, Aug 9, 2019 at 6:47 PM Will Deacon <will@kernel.org> wrote:
> > On Wed, Aug 07, 2019 at 04:55:12PM +0100, Steve Capper wrote:
> > > This patch series adds support for 52-bit kernel VAs using some of the
> > > machinery already introduced by the 52-bit userspace VA code in 5.0.
> >
> > Cheers, I've pushed this out on a for-next/52-bit-kva branch with one
> > small patch on top and Catalin's tags added.
> 
> As of commit 14c127c957c1c607 ("arm64: mm: Flip kernel VA space"), the
> kernel log is spammed with
> 
>     virt_to_phys used for non-linear address: (____ptrval____)
> (__func__.6603+0x14d681/0x17fb3d)
>     WARNING: CPU: 0 PID: 264 at arch/arm64/mm/physaddr.c:15
> __virt_to_phys+0x28/0x58
>     Modules linked in:
>     CPU: 0 PID: 264 Comm: mdev Not tainted
> 5.3.0-rc3-rcar3-initrd-00002-g14c127c957c1c607 #38
>     Hardware name: Renesas Ebisu-4D board based on r8a77990 (DT)
>     pstate: 60000005 (nZCv daif -PAN -UAO)
>     pc : __virt_to_phys+0x28/0x58
>     lr : __virt_to_phys+0x28/0x58
>     sp : ffffffc011953c80
>     x29: ffffffc011953c80 x28: ffffff8078790140
>     x27: 0000000000000000 x26: 0000000000000000
>     x25: ffffffc010a539b9 x24: ffffffc010a86000
>     x23: ffffffc010a539ba x22: 0000000000000001
>     x21: 0000000000202038 x20: 0000000000000001
>     x19: ffffffc010a539b9 x18: 000000000000000a
>     x17: 0000000000000000 x16: 0000000000000000
>     x15: 00000000000ca51d x14: 0720072007200720
>     x13: 0720072007200720 x12: 0720072007200720
>     x11: 0720072007200720 x10: 0720072007200720
>     x9 : 0720072007200720 x8 : 0000000000000001
>     x7 : 0000000000000007 x6 : ffffff8079824f00
>     x5 : 0000000000000140 x4 : 0000000000000000
>     x3 : 0000000000000000 x2 : 00000000ffffffff
>     x1 : 0713abbc9281cf00 x0 : 0000000000000000
>     Call trace:
>      __virt_to_phys+0x28/0x58
>      __check_object_size+0xd0/0x1e0
>      filldir64+0x1d8/0x2b0
>      kernfs_fop_readdir+0x64/0x200
>      iterate_dir+0x68/0x144
>      ksys_getdents64+0x88/0x154
>      __arm64_sys_getdents64+0x18/0x24
>      el0_svc_common.constprop.0+0x84/0xe8
>      el0_svc_compat_handler+0x18/0x20
>      el0_svc_compat+0x8/0x10
>     ---[ end trace 6980a45f636e18be ]---
> 
> as soon as userspace starts.

Can you try the hack I posted here, please?

https://lkml.org/lkml/2019/8/13/555

Also, what .config are you using?

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: crecklin@redhat.com, Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	bhsharma@redhat.com, Steve Capper <steve.capper@arm.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	maz@kernel.org, Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH V5 00/12] 52-bit kernel + user VAs
Date: Tue, 13 Aug 2019 14:10:13 +0100	[thread overview]
Message-ID: <20190813131013.vpc5a2vlxwghizxa@willie-the-truck> (raw)
In-Reply-To: <CAMuHMdWvkWGoNC5HbWoZwtpg5VXxTZqRZqQy4BLPgQXZJtKnsQ@mail.gmail.com>

Hi Geert,

On Tue, Aug 13, 2019 at 02:43:23PM +0200, Geert Uytterhoeven wrote:
> On Fri, Aug 9, 2019 at 6:47 PM Will Deacon <will@kernel.org> wrote:
> > On Wed, Aug 07, 2019 at 04:55:12PM +0100, Steve Capper wrote:
> > > This patch series adds support for 52-bit kernel VAs using some of the
> > > machinery already introduced by the 52-bit userspace VA code in 5.0.
> >
> > Cheers, I've pushed this out on a for-next/52-bit-kva branch with one
> > small patch on top and Catalin's tags added.
> 
> As of commit 14c127c957c1c607 ("arm64: mm: Flip kernel VA space"), the
> kernel log is spammed with
> 
>     virt_to_phys used for non-linear address: (____ptrval____)
> (__func__.6603+0x14d681/0x17fb3d)
>     WARNING: CPU: 0 PID: 264 at arch/arm64/mm/physaddr.c:15
> __virt_to_phys+0x28/0x58
>     Modules linked in:
>     CPU: 0 PID: 264 Comm: mdev Not tainted
> 5.3.0-rc3-rcar3-initrd-00002-g14c127c957c1c607 #38
>     Hardware name: Renesas Ebisu-4D board based on r8a77990 (DT)
>     pstate: 60000005 (nZCv daif -PAN -UAO)
>     pc : __virt_to_phys+0x28/0x58
>     lr : __virt_to_phys+0x28/0x58
>     sp : ffffffc011953c80
>     x29: ffffffc011953c80 x28: ffffff8078790140
>     x27: 0000000000000000 x26: 0000000000000000
>     x25: ffffffc010a539b9 x24: ffffffc010a86000
>     x23: ffffffc010a539ba x22: 0000000000000001
>     x21: 0000000000202038 x20: 0000000000000001
>     x19: ffffffc010a539b9 x18: 000000000000000a
>     x17: 0000000000000000 x16: 0000000000000000
>     x15: 00000000000ca51d x14: 0720072007200720
>     x13: 0720072007200720 x12: 0720072007200720
>     x11: 0720072007200720 x10: 0720072007200720
>     x9 : 0720072007200720 x8 : 0000000000000001
>     x7 : 0000000000000007 x6 : ffffff8079824f00
>     x5 : 0000000000000140 x4 : 0000000000000000
>     x3 : 0000000000000000 x2 : 00000000ffffffff
>     x1 : 0713abbc9281cf00 x0 : 0000000000000000
>     Call trace:
>      __virt_to_phys+0x28/0x58
>      __check_object_size+0xd0/0x1e0
>      filldir64+0x1d8/0x2b0
>      kernfs_fop_readdir+0x64/0x200
>      iterate_dir+0x68/0x144
>      ksys_getdents64+0x88/0x154
>      __arm64_sys_getdents64+0x18/0x24
>      el0_svc_common.constprop.0+0x84/0xe8
>      el0_svc_compat_handler+0x18/0x20
>      el0_svc_compat+0x8/0x10
>     ---[ end trace 6980a45f636e18be ]---
> 
> as soon as userspace starts.

Can you try the hack I posted here, please?

https://lkml.org/lkml/2019/8/13/555

Also, what .config are you using?

Will

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  reply	other threads:[~2019-08-13 13:10 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-07 15:55 [PATCH V5 00/12] 52-bit kernel + user VAs Steve Capper
2019-08-07 15:55 ` [PATCH V5 01/12] arm64: mm: Remove bit-masking optimisations for PAGE_OFFSET and VMEMMAP_START Steve Capper
2019-08-07 15:55 ` [PATCH V5 02/12] arm64: mm: Flip kernel VA space Steve Capper
2019-08-07 16:12   ` Catalin Marinas
2019-08-07 15:55 ` [PATCH V5 03/12] arm64: kasan: Switch to using KASAN_SHADOW_OFFSET Steve Capper
2019-08-07 16:12   ` Catalin Marinas
2019-08-14 15:20   ` [PATCH] arm64: fix CONFIG_KASAN_SW_TAGS && CONFIG_KASAN_INLINE (was: Re: [PATCH V5 03/12] arm64: kasan: Switch to using) KASAN_SHADOW_OFFSET Mark Rutland
2019-08-14 15:57     ` Will Deacon
2019-08-14 16:03       ` Mark Rutland
2019-08-14 17:53         ` Steve Capper
2019-08-15 12:09         ` Will Deacon
2019-08-15 12:21           ` [PATCH] arm64: fix CONFIG_KASAN_SW_TAGS && CONFIG_KASAN_INLINE Andrey Ryabinin
2019-08-15 12:22             ` Will Deacon
2019-08-20  6:02           ` [PATCH] arm64: fix CONFIG_KASAN_SW_TAGS && CONFIG_KASAN_INLINE (was: Re: [PATCH V5 03/12] arm64: kasan: Switch to using) KASAN_SHADOW_OFFSET Bhupesh Sharma
2019-08-14 16:07     ` Steve Capper
2019-08-14 16:14       ` Steve Capper
2019-08-07 15:55 ` [PATCH V5 04/12] arm64: dump: De-constify VA_START and KASAN_SHADOW_START Steve Capper
2019-08-07 15:55 ` [PATCH V5 05/12] arm64: mm: Introduce VA_BITS_MIN Steve Capper
2019-08-07 16:14   ` Catalin Marinas
2019-08-07 15:55 ` [PATCH V5 06/12] arm64: mm: Introduce vabits_actual Steve Capper
2019-08-07 16:16   ` Catalin Marinas
2019-08-07 15:55 ` [PATCH V5 07/12] arm64: mm: Logic to make offset_ttbr1 conditional Steve Capper
2019-08-07 15:55 ` [PATCH V5 08/12] arm64: mm: Separate out vmemmap Steve Capper
2019-08-07 15:55 ` [PATCH V5 09/12] arm64: mm: Modify calculation of VMEMMAP_SIZE Steve Capper
2019-08-07 15:55 ` [PATCH V5 10/12] arm64: mm: Introduce 52-bit Kernel VAs Steve Capper
2019-08-07 15:55 ` [PATCH V5 11/12] arm64: mm: Remove vabits_user Steve Capper
2019-08-07 16:17   ` Catalin Marinas
2019-08-07 15:55 ` [PATCH V5 12/12] docs: arm64: Add layout and 52-bit info to memory document Steve Capper
2019-08-09 16:47 ` [PATCH V5 00/12] 52-bit kernel + user VAs Will Deacon
2019-08-13 11:23   ` Steve Capper
2019-08-13 11:59     ` Will Deacon
2019-08-13 12:43   ` Geert Uytterhoeven
2019-08-13 12:43     ` Geert Uytterhoeven
2019-08-13 13:10     ` Will Deacon [this message]
2019-08-13 13:10       ` Will Deacon
2019-08-13 13:36       ` Geert Uytterhoeven
2019-08-13 13:36         ` Geert Uytterhoeven
2019-08-14  8:04         ` Bhupesh Sharma
2019-08-14  8:04           ` Bhupesh Sharma
2019-08-14  8:21           ` Will Deacon
2019-08-14  8:21             ` Will Deacon
2019-08-14 11:59             ` Bhupesh Sharma
2019-08-14 11:59               ` Bhupesh Sharma
2019-08-14 12:24               ` Will Deacon
2019-08-14 12:24                 ` Will Deacon

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