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From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	Michel Thierry <michel.thierry@intel.com>
Subject: [PATCH v2 00/15] DSB enablement.
Date: Wed, 21 Aug 2019 12:02:20 +0530	[thread overview]
Message-ID: <20190821063236.19705-1-animesh.manna@intel.com> (raw)

Display State Buffer (DSB) is hardware capability which allows driver to batch submit HW programming.

As part of initial enablement common api created which currently used to program gamma lut proramming.

Going forwad DSB support can be added for HDR and flip related operation.

HSDES: 1209978241
BSpec: 32020

v1: Initial version.

v2: Move intel_dsb files under display folder and fixed an issue.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (15):
  drm/i915/dsb: feature flag added for display state buffer.
  drm/i915/dsb: DSB context creation.
  drm/i915/dsb: single register write function for DSB.
  drm/i915/dsb: Added enum for reg write capability.
  drm/i915/dsb: Indexed register write function for DSB.
  drm/i915/dsb: Update i915_write to call dsb-write.
  drm/i915/dsb: Register definition of DSB registers.
  drm/i915/dsb: Check DSB engine status.
  drm/i915/dsb: functions to enable/disable DSB engine.
  drm/i915/dsb: function to trigger workload execution of DSB.
  drm/i915/dsb: function to destroy DSB context.
  drm/i915/dsb: Early prepare of dsb context.
  drm/i915/dsb: Cleanup of DSB context.
  drm/i915/dsb: Documentation for DSB.
  drm/i915/dsb: Enable gamma lut programming using DSB.

 Documentation/gpu/i915.rst                    |   9 +
 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/display/intel_color.c    |   4 +
 drivers/gpu/drm/i915/display/intel_display.c  |  27 ++
 .../drm/i915/display/intel_display_types.h    |   6 +
 drivers/gpu/drm/i915/display/intel_dsb.c      | 313 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dsb.h      |  48 +++
 drivers/gpu/drm/i915/i915_drv.h               |   9 +-
 drivers/gpu/drm/i915/i915_reg.h               |  53 ++-
 drivers/gpu/drm/i915/intel_device_info.h      |   1 +
 10 files changed, 461 insertions(+), 10 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_dsb.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_dsb.h

-- 
2.22.0

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             reply	other threads:[~2019-08-21  6:39 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-21  6:32 Animesh Manna [this message]
2019-08-21  6:32 ` [PATCH v2 01/15] drm/i915/dsb: feature flag added for display state buffer Animesh Manna
2019-08-21  6:32 ` [PATCH v2 02/15] drm/i915/dsb: DSB context creation Animesh Manna
2019-08-21 18:11   ` Chris Wilson
2019-08-22 12:05     ` Animesh Manna
2019-08-22 12:09       ` Chris Wilson
2019-10-17  8:35         ` Tvrtko Ursulin
2019-10-17 12:52           ` Animesh Manna
2019-10-17 13:09             ` Tvrtko Ursulin
2019-10-17 13:53               ` Animesh Manna
2019-10-17 14:38                 ` Tvrtko Ursulin
2019-10-21 10:11                   ` Animesh Manna
2019-10-21 10:18                     ` Chris Wilson
2019-08-21  6:32 ` [PATCH v2 03/15] drm/i915/dsb: single register write function for DSB Animesh Manna
2019-08-21  6:32 ` [PATCH v2 04/15] drm/i915/dsb: Added enum for reg write capability Animesh Manna
2019-08-22 12:57   ` Jani Nikula
2019-08-21  6:32 ` [PATCH v2 05/15] drm/i915/dsb: Indexed register write function for DSB Animesh Manna
2019-08-21 18:27   ` Chris Wilson
2019-08-22 12:06     ` Animesh Manna
2019-08-21  6:32 ` [PATCH v2 06/15] drm/i915/dsb: Update i915_write to call dsb-write Animesh Manna
2019-08-21 18:29   ` Chris Wilson
2019-08-22 13:11     ` Jani Nikula
2019-08-21  6:32 ` [PATCH v2 07/15] drm/i915/dsb: Register definition of DSB registers Animesh Manna
2019-08-21  6:32 ` [PATCH v2 08/15] drm/i915/dsb: Check DSB engine status Animesh Manna
2019-08-21  6:32 ` [PATCH v2 09/15] drm/i915/dsb: functions to enable/disable DSB engine Animesh Manna
2019-08-21  6:32 ` [PATCH v2 10/15] drm/i915/dsb: function to trigger workload execution of DSB Animesh Manna
2019-08-21 18:43   ` Chris Wilson
2019-08-22 12:07     ` Animesh Manna
2019-08-21  6:32 ` [PATCH v2 11/15] drm/i915/dsb: function to destroy DSB context Animesh Manna
2019-08-21 18:45   ` Chris Wilson
2019-08-21  6:32 ` [PATCH v2 12/15] drm/i915/dsb: Early prepare of dsb context Animesh Manna
2019-08-21  6:32 ` [PATCH v2 13/15] drm/i915/dsb: Cleanup of DSB context Animesh Manna
2019-08-21  6:32 ` [PATCH v2 14/15] drm/i915/dsb: Documentation for DSB Animesh Manna
2019-08-21  6:32 ` [PATCH v2 15/15] drm/i915/dsb: Enable gamma lut programming using DSB Animesh Manna
2019-08-22 13:23   ` Jani Nikula
2019-08-22 14:45     ` Animesh Manna
2019-08-21  7:11 ` ✗ Fi.CI.CHECKPATCH: warning for DSB enablement. (rev2) Patchwork
2019-08-21  7:12 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-08-21  7:32 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-21 18:46 ` ✗ Fi.CI.IGT: failure " Patchwork

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