From: Geert Uytterhoeven <geert+renesas@glider.be> To: Magnus Damm <magnus.damm@gmail.com> Cc: Simon Horman <horms@verge.net.au>, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [PATCH v2 1/7] soc: renesas: rcar-sysc: Prepare for fixing power request conflicts Date: Wed, 28 Aug 2019 13:36:12 +0200 [thread overview] Message-ID: <20190828113618.6672-2-geert+renesas@glider.be> (raw) In-Reply-To: <20190828113618.6672-1-geert+renesas@glider.be> Recent R-Car Gen3 SoCs added an External Request Mask Register to the System Controller (SYSC). This register allows to mask external power requests for CPU or 3DG domains, to prevent conflicts between powering off CPU cores or the 3D Graphics Engine, and changing the state of another power domain through SYSC, which could lead to CPG state machine lock-ups. Add support for making use of this register. Take into account that the register is optional, and that its location and contents are SoC-specific. Note that the issue fixed by this cannot happen in the upstream kernel, as upstream has no support for graphics acceleration yet. SoCs lacking the External Request Mask Register may need a different mitigation in the future. Inspired by a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v2: - Improve patch description. --- drivers/soc/renesas/rcar-sysc.c | 16 ++++++++++++++++ drivers/soc/renesas/rcar-sysc.h | 3 +++ 2 files changed, 19 insertions(+) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 59b5e6b102722a6d..176de145f4230fbd 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -63,6 +63,7 @@ struct rcar_sysc_ch { static void __iomem *rcar_sysc_base; static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */ +static u32 rcar_sysc_extmask_offs, rcar_sysc_extmask_val; static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on) { @@ -105,6 +106,14 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on) spin_lock_irqsave(&rcar_sysc_lock, flags); + /* + * Mask external power requests for CPU or 3DG domains + */ + if (rcar_sysc_extmask_val) { + iowrite32(rcar_sysc_extmask_val, + rcar_sysc_base + rcar_sysc_extmask_offs); + } + /* * The interrupt source needs to be enabled, but masked, to prevent the * CPU from receiving it. @@ -148,6 +157,9 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on) iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); out: + if (rcar_sysc_extmask_val) + iowrite32(0, rcar_sysc_base + rcar_sysc_extmask_offs); + spin_unlock_irqrestore(&rcar_sysc_lock, flags); pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off", @@ -360,6 +372,10 @@ static int __init rcar_sysc_pd_init(void) rcar_sysc_base = base; + /* Optional External Request Mask Register */ + rcar_sysc_extmask_offs = info->extmask_offs; + rcar_sysc_extmask_val = info->extmask_val; + domains = kzalloc(sizeof(*domains), GFP_KERNEL); if (!domains) { error = -ENOMEM; diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h index 485520a5b295c13e..21ee3ff8620bbafe 100644 --- a/drivers/soc/renesas/rcar-sysc.h +++ b/drivers/soc/renesas/rcar-sysc.h @@ -44,6 +44,9 @@ struct rcar_sysc_info { int (*init)(void); /* Optional */ const struct rcar_sysc_area *areas; unsigned int num_areas; + /* Optional External Request Mask Register */ + u32 extmask_offs; /* SYSCEXTMASK register offset */ + u32 extmask_val; /* SYSCEXTMASK register mask value */ }; extern const struct rcar_sysc_info r8a7743_sysc_info; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert+renesas@glider.be> To: Magnus Damm <magnus.damm@gmail.com> Cc: linux-renesas-soc@vger.kernel.org, Simon Horman <horms@verge.net.au>, Geert Uytterhoeven <geert+renesas@glider.be>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/7] soc: renesas: rcar-sysc: Prepare for fixing power request conflicts Date: Wed, 28 Aug 2019 13:36:12 +0200 [thread overview] Message-ID: <20190828113618.6672-2-geert+renesas@glider.be> (raw) In-Reply-To: <20190828113618.6672-1-geert+renesas@glider.be> Recent R-Car Gen3 SoCs added an External Request Mask Register to the System Controller (SYSC). This register allows to mask external power requests for CPU or 3DG domains, to prevent conflicts between powering off CPU cores or the 3D Graphics Engine, and changing the state of another power domain through SYSC, which could lead to CPG state machine lock-ups. Add support for making use of this register. Take into account that the register is optional, and that its location and contents are SoC-specific. Note that the issue fixed by this cannot happen in the upstream kernel, as upstream has no support for graphics acceleration yet. SoCs lacking the External Request Mask Register may need a different mitigation in the future. Inspired by a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v2: - Improve patch description. --- drivers/soc/renesas/rcar-sysc.c | 16 ++++++++++++++++ drivers/soc/renesas/rcar-sysc.h | 3 +++ 2 files changed, 19 insertions(+) diff --git a/drivers/soc/renesas/rcar-sysc.c b/drivers/soc/renesas/rcar-sysc.c index 59b5e6b102722a6d..176de145f4230fbd 100644 --- a/drivers/soc/renesas/rcar-sysc.c +++ b/drivers/soc/renesas/rcar-sysc.c @@ -63,6 +63,7 @@ struct rcar_sysc_ch { static void __iomem *rcar_sysc_base; static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */ +static u32 rcar_sysc_extmask_offs, rcar_sysc_extmask_val; static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on) { @@ -105,6 +106,14 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on) spin_lock_irqsave(&rcar_sysc_lock, flags); + /* + * Mask external power requests for CPU or 3DG domains + */ + if (rcar_sysc_extmask_val) { + iowrite32(rcar_sysc_extmask_val, + rcar_sysc_base + rcar_sysc_extmask_offs); + } + /* * The interrupt source needs to be enabled, but masked, to prevent the * CPU from receiving it. @@ -148,6 +157,9 @@ static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on) iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); out: + if (rcar_sysc_extmask_val) + iowrite32(0, rcar_sysc_base + rcar_sysc_extmask_offs); + spin_unlock_irqrestore(&rcar_sysc_lock, flags); pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off", @@ -360,6 +372,10 @@ static int __init rcar_sysc_pd_init(void) rcar_sysc_base = base; + /* Optional External Request Mask Register */ + rcar_sysc_extmask_offs = info->extmask_offs; + rcar_sysc_extmask_val = info->extmask_val; + domains = kzalloc(sizeof(*domains), GFP_KERNEL); if (!domains) { error = -ENOMEM; diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h index 485520a5b295c13e..21ee3ff8620bbafe 100644 --- a/drivers/soc/renesas/rcar-sysc.h +++ b/drivers/soc/renesas/rcar-sysc.h @@ -44,6 +44,9 @@ struct rcar_sysc_info { int (*init)(void); /* Optional */ const struct rcar_sysc_area *areas; unsigned int num_areas; + /* Optional External Request Mask Register */ + u32 extmask_offs; /* SYSCEXTMASK register offset */ + u32 extmask_val; /* SYSCEXTMASK register mask value */ }; extern const struct rcar_sysc_info r8a7743_sysc_info; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-28 11:58 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-28 11:36 [PATCH v2 0/7] soc: renesas: rcar-gen3-sysc: Fix power request conflicts Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven [this message] 2019-08-28 11:36 ` [PATCH v2 1/7] soc: renesas: rcar-sysc: Prepare for fixing " Geert Uytterhoeven 2019-08-28 11:36 ` [PATCH v2 2/7] soc: renesas: r8a7795-sysc: Fix " Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven 2019-08-28 11:36 ` [PATCH v2 3/7] soc: renesas: r8a7796-sysc: " Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven 2019-08-28 11:36 ` [PATCH v2 4/7] soc: renesas: r8a77965-sysc: " Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven 2019-08-28 11:36 ` [PATCH v2 5/7] soc: renesas: r8a77970-sysc: " Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven 2019-08-28 11:36 ` [PATCH v2 6/7] soc: renesas: r8a77980-sysc: " Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven 2019-08-28 11:36 ` [PATCH v2 7/7] soc: renesas: r8a77990-sysc: " Geert Uytterhoeven 2019-08-28 11:36 ` Geert Uytterhoeven 2019-08-29 4:14 ` [PATCH v2 0/7] soc: renesas: rcar-gen3-sysc: " Yoshihiro Shimoda 2019-08-29 4:14 ` Yoshihiro Shimoda 2019-09-03 12:10 ` Geert Uytterhoeven 2019-09-03 12:10 ` Geert Uytterhoeven 2019-08-31 9:48 ` Simon Horman 2019-08-31 9:48 ` Simon Horman
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