From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: George Dunlap <George.Dunlap@eu.citrix.com>,
AndrewCooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: [Xen-devel] [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3()
Date: Thu, 12 Sep 2019 17:42:00 +0200 [thread overview]
Message-ID: <20190912154200.lakjfd6jzju7n7ok@Air-de-Roger> (raw)
In-Reply-To: <a77b09ff-e0df-6b54-c6e7-156ce9dd6f29@suse.com>
On Thu, Sep 12, 2019 at 04:47:17PM +0200, Jan Beulich wrote:
> On 12.09.2019 16:44, Roger Pau Monné wrote:
> > On a different question, AFAICT hvm_set_cr3 should never be called
> > with X86_CR3_NOFLUSH set? If so, do you think it would make sense to
> > add an assert to that regard?
>
> I've been debating this with myself, and decided against for now.
> We don't know what meaning the bit may gain eventually in the
> actual register.
I'm slightly lost here, the noflush bit is actually defined in the
Intel SDM for cr3, and hence won't gain any other meaning?
Or else you might still risk writing a cr3 with noflush set in case
the callers somehow misbehave?
Thanks, Roger.
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next prev parent reply other threads:[~2019-09-12 15:42 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-11 15:15 [Xen-devel] [PATCH RESEND/PING 0/9] XSA-292 follow-up Jan Beulich
2019-09-11 15:21 ` [Xen-devel] [PATCH 1/9] x86: adjust cr3_pcid() return type Jan Beulich
2019-09-12 9:19 ` Roger Pau Monné
2019-09-11 15:22 ` [Xen-devel] [PATCH 2/9] x86: limit the amount of TLB flushing in switch_cr3_cr4() Jan Beulich
2019-09-12 9:54 ` Roger Pau Monné
2019-09-12 10:11 ` Jan Beulich
2019-09-12 10:38 ` Roger Pau Monné
2019-09-11 15:22 ` [Xen-devel] [PATCH 3/9] x86/mm: honor opt_pcid also for 32-bit PV domains Jan Beulich
2019-09-12 10:34 ` Roger Pau Monné
2019-09-12 10:45 ` Jan Beulich
2019-09-11 15:23 ` [Xen-devel] [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3() Jan Beulich
2019-09-12 11:35 ` Roger Pau Monné
2019-09-12 11:52 ` Jan Beulich
2019-09-12 14:44 ` Roger Pau Monné
2019-09-12 14:47 ` Jan Beulich
2019-09-12 15:42 ` Roger Pau Monné [this message]
2019-09-12 15:52 ` Jan Beulich
2019-09-11 15:24 ` [Xen-devel] [PATCH 5/9] x86/HVM: refuse CR3 loads with reserved (upper) bits set Jan Beulich
2019-09-12 11:45 ` Roger Pau Monné
2019-09-12 12:01 ` Jan Beulich
2019-09-11 15:25 ` [Xen-devel] [PATCH 6/9] x86/HVM: relax shadow mode check in hvm_set_cr3() Jan Beulich
2019-09-12 14:50 ` Roger Pau Monné
2019-09-11 15:25 ` [Xen-devel] [PATCH 7/9] x86/HVM: cosmetics to hvm_set_cr3() Jan Beulich
2019-09-12 15:04 ` Roger Pau Monné
2019-09-11 15:26 ` [Xen-devel] [PATCH 8/9] x86/CPUID: drop INVPCID dependency on PCID Jan Beulich
2019-09-12 15:11 ` Roger Pau Monné
2019-09-11 15:26 ` [Xen-devel] [PATCH 9/9] x86: PCID is unused when !PV Jan Beulich
2019-09-12 15:31 ` Roger Pau Monné
2019-09-12 15:46 ` Jan Beulich
2019-09-12 15:48 ` Jan Beulich
2019-09-12 15:57 ` Roger Pau Monné
-- strict thread matches above, loose matches on Subject: below --
2019-05-02 11:35 [PATCH 0/9] XSA-292 follow-up Jan Beulich
2019-05-02 12:20 ` [Xen-devel] [PATCH 4/9] x86/HVM: move NOFLUSH handling out of hvm_set_cr3() Jan Beulich
2019-05-02 12:20 ` Jan Beulich
2019-05-02 13:07 ` Paul Durrant
2019-05-02 13:07 ` Paul Durrant
2019-05-02 13:23 ` Jan Beulich
2019-05-02 13:23 ` Jan Beulich
2019-05-02 13:25 ` Paul Durrant
2019-05-02 13:25 ` Paul Durrant
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