Re: [Xen-devel] [PATCH v10 15/16] microcode: disable late loading if CPUs are affected by BDF90

From: Chao Gao <chao.gao@intel.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Sergey Dyasli" <sergey.dyasli@citrix.com>,
	"Ashok Raj" <ashok.raj@intel.com>, "Wei Liu" <wl@xen.org>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	xen-devel@lists.xenproject.org,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [Xen-devel] [PATCH v10 15/16] microcode: disable late loading if CPUs are affected by BDF90
Date: Tue, 17 Sep 2019 17:01:28 +0800	[thread overview]
Message-ID: <20190917090128.GB10190@gao-cwp> (raw)
In-Reply-To: <f5d22eed-42c0-5d99-7adc-a46ac52a9639@suse.com>

On Fri, Sep 13, 2019 at 11:22:59AM +0200, Jan Beulich wrote:
>On 12.09.2019 09:22, Chao Gao wrote:
>> @@ -283,6 +284,27 @@ static enum microcode_match_result compare_patch(
>>                                                               : OLD_UCODE;
>>  }
>>  
>> +static bool is_blacklisted(void)
>> +{
>> +    struct cpuinfo_x86 *c = &current_cpu_data;
>> +    uint64_t llc_size = c->x86_cache_size * 1024ULL;
>> +    struct cpu_signature *sig = &this_cpu(cpu_sig);
>> +
>> +    do_div(llc_size, c->x86_max_cores);
>> +
>> +    /*
>> +     * Late loading on model 79 with microcode revision less than 0x0b000021
>> +     * and LLC size per core bigger than 2.5MB may result in a system hang.
>> +     * This behavior is documented in item BDF90, #334165 (Intel Xeon
>> +     * Processor E7-8800/4800 v4 Product Family).
>> +     */
>> +    if ( c->x86 == 6 && c->x86_model == 0x4F && c->x86_mask == 0x1 &&
>> +         llc_size > 2621440 && sig->rev < 0x0b000021 )
>> +        return true;
>> +
>> +    return false;
>> +}
>
>Isn't this misbehavior worked around by the wbinvd() you add in the next
>patch?

Hi Jan and Andrew,

Perhaps I misunderstood what I was told. I am confirming with Ashok
whether this patch is necessary.

>
>> --- a/xen/include/asm-x86/microcode.h
>> +++ b/xen/include/asm-x86/microcode.h
>> @@ -30,6 +30,7 @@ struct microcode_ops {
>>      bool (*match_cpu)(const struct microcode_patch *patch);
>>      enum microcode_match_result (*compare_patch)(
>>          const struct microcode_patch *new, const struct microcode_patch *old);
>> +    bool (*is_blacklisted)(void);
>
>Why a hook rather than a boolean flag, which could be set by
>microcode_update_one() (as invoked during AP bringup)?

How about set the boolean flag in Intel_errata_workarounds?

One limitation of setting the flag in microcode_update_one() is:
BSP also calls microcode_update_one(). But calculating LLC size per
core on BSP would meet the same issue as the following patch
(i.e. patch 16/16): BSP's current_cpu_data isn't initialized
properly. We might need to revert commit f97838bbd980a01 in
some way and reenumerate features after ucode loading is done.

Thanks
Chao

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