From: Ben Dooks <ben.dooks@codethink.co.uk>
To: linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-kernel@lists.codethink.co.uk,
Ben Dooks <ben.dooks@codethink.co.uk>
Subject: [PATCH v2 7/7] ASoC: tegra: take packing settings from the audio cif_config
Date: Mon, 23 Sep 2019 17:20:26 +0100 [thread overview]
Message-ID: <20190923162026.14882-8-ben.dooks@codethink.co.uk> (raw)
In-Reply-To: <20190923162026.14882-1-ben.dooks@codethink.co.uk>
If the CIF is not configured as 16 or 8 bit, then the
packing for 8/16 bits should not be enabled as the
hardware only supports 8 or 16 bit packing.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index 58e05ceb86da..c2f2e29dd32e 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif,
(channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
val = tegra30_apbif_read(reg);
val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
- TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
- val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
- TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
- TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+ TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK |
+ TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN);
+ val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT);
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+ cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4;
+
tegra30_apbif_write(reg, val);
cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
@@ -203,10 +210,16 @@ int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
(channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
val = tegra30_apbif_read(reg);
val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK |
- TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK);
- val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) |
- TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN |
- TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+ TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK |
+ TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN);
+ val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT);
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+ cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_8_4;
tegra30_apbif_write(reg, val);
cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
--
2.23.0
WARNING: multiple messages have this Message-ID (diff)
From: Ben Dooks <ben.dooks@codethink.co.uk>
To: linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-kernel@lists.codethink.co.uk,
Ben Dooks <ben.dooks@codethink.co.uk>
Subject: [alsa-devel] [PATCH v2 7/7] ASoC: tegra: take packing settings from the audio cif_config
Date: Mon, 23 Sep 2019 17:20:26 +0100 [thread overview]
Message-ID: <20190923162026.14882-8-ben.dooks@codethink.co.uk> (raw)
In-Reply-To: <20190923162026.14882-1-ben.dooks@codethink.co.uk>
If the CIF is not configured as 16 or 8 bit, then the
packing for 8/16 bits should not be enabled as the
hardware only supports 8 or 16 bit packing.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index 58e05ceb86da..c2f2e29dd32e 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif,
(channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
val = tegra30_apbif_read(reg);
val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
- TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
- val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
- TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
- TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+ TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK |
+ TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN);
+ val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT);
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+ cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4;
+
tegra30_apbif_write(reg, val);
cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
@@ -203,10 +210,16 @@ int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
(channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
val = tegra30_apbif_read(reg);
val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK |
- TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK);
- val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) |
- TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN |
- TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+ TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK |
+ TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN);
+ val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT);
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+ cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+ if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+ val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_8_4;
tegra30_apbif_write(reg, val);
cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
--
2.23.0
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next prev parent reply other threads:[~2019-09-23 16:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-23 16:20 TDM audio support and sample size updates for tegra30 Ben Dooks
2019-09-23 16:20 ` [alsa-devel] " Ben Dooks
2019-09-23 16:20 ` [PATCH v2 1/7] ASoC: tegra: Add a TDM configuration callback Ben Dooks
2019-09-23 16:20 ` [alsa-devel] " Ben Dooks
2019-09-24 9:22 ` Jon Hunter
2019-09-24 9:22 ` [alsa-devel] " Jon Hunter
2019-09-24 9:26 ` Ben Dooks
2019-09-24 9:26 ` [alsa-devel] " Ben Dooks
2019-09-23 16:20 ` [PATCH v2 2/7] ASoC: tegra: Allow 24bit and 32bit samples Ben Dooks
2019-09-23 16:20 ` [alsa-devel] " Ben Dooks
2019-09-23 16:37 ` Pierre-Louis Bossart
2019-09-23 16:37 ` [alsa-devel] " Pierre-Louis Bossart
2019-09-24 7:58 ` Ben Dooks
2019-09-24 7:58 ` [alsa-devel] " Ben Dooks
2019-09-23 16:20 ` [PATCH v2 3/7] ASoC: tegra: i2s: Add support for more than 2 channels Ben Dooks
2019-09-23 16:20 ` [alsa-devel] " Ben Dooks
2019-09-23 16:20 ` [PATCH v2 4/7] ASoC: tegra: disable rx_fifo after disable stream Ben Dooks
2019-09-23 16:20 ` [alsa-devel] " Ben Dooks
2019-09-23 16:20 ` [PATCH v2 5/7] ASoC: tegra: set i2s_offset to 0 for tdm Ben Dooks
2019-09-23 16:20 ` [alsa-devel] " Ben Dooks
2019-09-23 16:20 ` [PATCH v2 6/7] ASoC: tegra: config fifos on hw_param changes Ben Dooks
2019-09-23 16:20 ` [alsa-devel] " Ben Dooks
2019-09-23 16:20 ` Ben Dooks [this message]
2019-09-23 16:20 ` [alsa-devel] [PATCH v2 7/7] ASoC: tegra: take packing settings from the audio cif_config Ben Dooks
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