From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org,
mark.rutland@arm.com, cw00.choi@samsung.com,
kyungmin.park@samsung.com, m.szyprowski@samsung.com,
s.nawrocki@samsung.com, myungjoo.ham@samsung.com,
robh+dt@kernel.org, willy.mh.wolff.ml@gmail.com,
Lukasz Luba <l.luba@partner.samsung.com>
Subject: [PATCH v2 3/4] ARM: dts: exynos: map 0x10000 SFR instead of 0x100 in DMC Exynos5422
Date: Tue, 1 Oct 2019 14:54:35 +0200 [thread overview]
Message-ID: <20191001125436.24086-4-l.luba@partner.samsung.com> (raw)
In-Reply-To: <20191001125436.24086-1-l.luba@partner.samsung.com>
There is a need to access registers at address offset near 0x10000.
These registers are private DMC performance counters, which might be used
as interrupt trigger when overflow. Potential usage is to skip polling
in devfreq framework and switch to interrupt managed bandwidth control.
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
arch/arm/boot/dts/exynos5420.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 45f63cd82e56..ac6dc44dbe4d 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -239,7 +239,7 @@
dmc: memory-controller@10c20000 {
compatible = "samsung,exynos5422-dmc";
- reg = <0x10c20000 0x100>, <0x10c30000 0x100>;
+ reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>, <16 1>;
interrupt-names = "drex_0", "drex_1";
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, willy.mh.wolff.ml@gmail.com,
robh+dt@kernel.org, b.zolnierkie@samsung.com, krzk@kernel.org,
Lukasz Luba <l.luba@partner.samsung.com>,
cw00.choi@samsung.com, kyungmin.park@samsung.com,
kgene@kernel.org, myungjoo.ham@samsung.com,
s.nawrocki@samsung.com, m.szyprowski@samsung.com
Subject: [PATCH v2 3/4] ARM: dts: exynos: map 0x10000 SFR instead of 0x100 in DMC Exynos5422
Date: Tue, 1 Oct 2019 14:54:35 +0200 [thread overview]
Message-ID: <20191001125436.24086-4-l.luba@partner.samsung.com> (raw)
In-Reply-To: <20191001125436.24086-1-l.luba@partner.samsung.com>
There is a need to access registers at address offset near 0x10000.
These registers are private DMC performance counters, which might be used
as interrupt trigger when overflow. Potential usage is to skip polling
in devfreq framework and switch to interrupt managed bandwidth control.
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
arch/arm/boot/dts/exynos5420.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 45f63cd82e56..ac6dc44dbe4d 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -239,7 +239,7 @@
dmc: memory-controller@10c20000 {
compatible = "samsung,exynos5422-dmc";
- reg = <0x10c20000 0x100>, <0x10c30000 0x100>;
+ reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>, <16 1>;
interrupt-names = "drex_0", "drex_1";
--
2.17.1
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next prev parent reply other threads:[~2019-10-01 12:55 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20191001125444eucas1p1c31d1492ed64a9417486f471b97eae8c@eucas1p1.samsung.com>
2019-10-01 12:54 ` [PATCH v2 0/4] Exynos5 DMC interrupt mode Lukasz Luba
2019-10-01 12:54 ` Lukasz Luba
2019-10-01 12:54 ` Lukasz Luba
[not found] ` <CGME20191001125444eucas1p2e4254acf8434e1fadf0e208dbe62b2d7@eucas1p2.samsung.com>
2019-10-01 12:54 ` [PATCH v2 1/4] dt-bindings: memory-controllers: Add Exynos5422 DMC interrupts description Lukasz Luba
2019-10-01 12:54 ` Lukasz Luba
2019-10-01 13:18 ` Krzysztof Kozlowski
2019-10-01 13:18 ` Krzysztof Kozlowski
2019-10-01 15:58 ` Lukasz Luba
2019-10-01 15:58 ` Lukasz Luba
2019-10-01 15:58 ` Lukasz Luba
[not found] ` <CGME20191001125445eucas1p21ea21a92cec96d660994d8d7f91128e0@eucas1p2.samsung.com>
2019-10-01 12:54 ` [PATCH v2 2/4] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422 Lukasz Luba
2019-10-01 12:54 ` Lukasz Luba
[not found] ` <CGME20191001125446eucas1p1fb2ad4c13feac8dfec8d5eeeeec0a64a@eucas1p1.samsung.com>
2019-10-01 12:54 ` Lukasz Luba [this message]
2019-10-01 12:54 ` [PATCH v2 3/4] ARM: dts: exynos: map 0x10000 SFR instead of 0x100 in DMC Exynos5422 Lukasz Luba
[not found] ` <CGME20191001125447eucas1p229f15daacca52b3df5bfd04b54914fb8@eucas1p2.samsung.com>
2019-10-01 12:54 ` [PATCH v2 4/4] memory: samsung: exynos5422-dmc: Add support for interrupt from performance counters Lukasz Luba
2019-10-01 12:54 ` Lukasz Luba
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